- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄378281 > ADC10065CIMT (NATIONAL SEMICONDUCTOR CORP) ADC10065 10-Bit 65 MSPS 3V A/D Converter PDF資料下載
參數(shù)資料
| 型號(hào)： | ADC10065CIMT |
| 廠(chǎng)商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | ADC |
| 英文描述： | ADC10065 10-Bit 65 MSPS 3V A/D Converter |
| 中文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | TSSOP-28 |
| 文件頁(yè)數(shù)： | 17/19頁(yè) |
| 文件大?。?/td> | 945K |
| 代理商： | ADC10065CIMT |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)
Applications Information
(Continued)
TABLE 1. IRS Pin Functions
IRS Pin
V
DDA
V
SSA
Floating
Full-Scale Input
2.0V
P-P
1.5V
P-P
1.0V
P-P
1.8 OUTPUT PINS
The ADC10065 has 10 TTL/CMOS compatible Data Output
pins. The offset binary data is present at these outputs while
the DF and STBY pins are low. While the t
OD
time provides
information about output timing, a simple way to capture a
valid output is to latch the data on the rising edge of the
conversion clock. Be very careful when driving a high ca-
pacitance bus. The more capacitance the output drivers
must charge for each conversion, the more instantaneous
digital current flows through V
DDIO
and V
SSIO
. These large
charging current spikes can cause on-chip ground noise and
couple into the analog circuitry, degrading dynamic perfor-
mance.Adequate bypassing, limiting output capacitance and
careful attention to the ground plane will reduce this prob-
lem. Additionally, bus capacitance beyond the specified
10 pF/pin will cause t
to increase, making it difficult to
properly latch the ADC output data. The result could be an
apparent reduction in dynamic performance. To minimize
noise due to output switching, minimize the load currents at
the digital outputs. This can be done by connecting buffers
between the ADC outputs and any other circuitry. Only one
driven input should beADC pins, will isolate the outputs from
trace and other circuit capacitances and limit the output
currents, which could otherwise result in performance deg-
radation.
1.9 APPLICATION SCHEMATICS
The following figures show simple examples of using the
ADC10065.
Figure 5
shows a typical differentially driven
input.
Figure 6
shows a single ended application circuit.
20077949
FIGURE 5. A Simple Application Using a Differential Driving Source
A
www.national.com
17
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC10065CIMTX | ADC10065 10-Bit 65 MSPS 3V A/D Converter |
| ADC10080CIMTX | 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter |
| ADC10080CIMT | 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter |
| ADC10080 | 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter |
| ADC10154CIWM | 10-Bit Plus Sign 4 レs ADCs with 4- or 8-Channel MUX, Track/Hold and Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC10065CIMT | 制造商:Texas Instruments 功能描述:IC 10BIT ADC 65MSPS 3V POWERWISE |
| ADC10065CIMT/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC10065CIMTX | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC10065CIMTX/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1006S055 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single 10 bits ADC, up to 55 MHz or 70 MHz |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。