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參數(shù)資料
| 型號(hào)： | ADC10062CIWM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold |
| 中文描述： | 2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
| 封裝： | SOP-24 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 333K |
| 代理商： | ADC10062CIWM |
ADC10061/ADC10062/ADC10064
10-Bit 600 ns A/D Converter with Input Multiplexer and
Sample/Hold
General Description
Using an innovative, patented multistep
*
conversion tech-
nique, the 10-bit ADC10061, ADC10062, and ADC10064
CMOS analog-to-digital converters offer sub-microsecond
conversion times yet dissipate a maximum of only 235 mW.
The ADC10061, ADC10062, and ADC10064 perform a
10-bit conversion in two lower-resolution “flashes”, thus
yielding a fast A/D without the cost, power dissipation, and
other problems associated with true flash approaches. The
ADC10061 is pin-compatible with the ADC1061 but much
faster, thus providing a convenient upgrade path for the
ADC1061.
The analog input voltage to the ADC10061, ADC10062, and
ADC10064 is sampled and held by an internal sampling cir-
cuit. Input signals at frequencies from dc to over 200 kHz
can therefore be digitized accurately without the need for an
external sample-and-hold circuit.
The ADC10062 and ADC10064 include a “speed-up” pin.
Connecting an external resistor between this pin and ground
reduces the typical conversion time to as little as 350 ns with
only a small increase in linearity error.
For ease of interface to microprocessors, the ADC10061,
ADC10062, and ADC10064 have been designed to appear
as a memory location or I/O port without the need for exter-
nal interface logic.
*
U.S. Patent Number 4918449
Features
n
Built-in sample-and-hold
n
Single +5V supply
n
1, 2, or 4-input multiplexer options
n
No external clock required
n
Speed adjust pin for faster conversions (ADC10062
and ADC10064). See ADC10662/4 for high speed
guaranteed performance.
Key Specifications
n
Conversion time to 10 bits
n
n
Sampling Rate
n
Low power dissipation
n
Total unadjusted error
n
No missing codes over temperature
600 ns typical,
900 ns max over temperature
800 kHz
235 mW (max)
±
1.0 LSB (max)
Applications
n
Digital signal processor front ends
n
Instrumentation
n
Disk drives
n
Mobile telecommunications
Simplified Block Diagram
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
DS011020-1
*
ADC10061 Only
**
ADC10062 and ADC10064 Only
***
ADC10064 Only
June 1999
A
S
1999 National Semiconductor Corporation
DS011020
www.national.com
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| ADC10062CIWM/NOPB | 功能描述:IC ADC 10BIT W/MUX 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC10062CIWMX | 功能描述:IC ADC 10BIT W/MUX 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC10062CMJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10062CMJ/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10064 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold |
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