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參數(shù)資料
| 型號(hào)： | ADC0852CCN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | ADC |
| 英文描述： | Multiplexed Comparator with 8-Bit Reference Divider |
| 中文描述： | 8-BIT COMPARATOR, ONE BIT ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 9/20頁(yè) |
| 文件大?。?/td> | 327K |
| 代理商： | ADC0852CCN |
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Functional Description
1. 1 The Sampled-data Comparator
The ADC0852 and ADC0854 utilize a sampled-data com-
parator structure to compare the analog difference between
a selected ‘‘
a
’’ and ‘‘
b
’’ input to an 8-bit programmable
threshold.
This comparator consists of a CMOS inverter with a capaci-
tively coupled input (Figure 4). Analog switches connect the
two comparator inputs to the input capacitor and also con-
nect the inverter’s input and output. This device in effect
now has one differential input pair. A comparison requires
two cycles, one for zeroing the comparator and another for
making the comparison.
FIGURE 4. Sampled-Data Comparator
In the first cycle (Figure 4a), one input switch and the invert-
er’s feedback switch are closed. In this interval, the input
capacitor (C) is charged to the connected input (V1) less the
inverter’s bias voltage (V
B
, approx. 1.2 volts). In the second
cycle (Figure 4b) these two switches are opened and the
other (V2) input’s switch is closed. The input capacitor now
subtracts its stored voltage from the second input and the
difference is amplified by the inverter’s open loop gain. The
inverter input (V
B
’) becomes V
B
b
(V1
b
V2)
C
C
a
C
S
and
the output will go high or low depending on the sign of V
B
’-
V
B
.
TL/H/5521–8
FIGURE 4a. Zeroing Phase
#
V
0
e
V
B
#
V on C
e
V
1
–V
B
#
C
S
e
Stray Input Node Cap.
#
V
B
e
Inverter Input Bias Voltage
TL/H/5521–9
FIGURE 4b. Compare Phase
#
V
B
ê
b
V
B
e
(V
2
b
V
1
)
C
C
a
C
S
#
V
0
e
b
A
C
a
C
S
[
CV
2
b
CV
1
]
#
V
0
is dependent on V
2
b
V
1
TL/H/5521–14
V
0
e
b
A
C
1
a
C
2
a
C
S
[
C
1
(V
2
b
V
1
)
a
C
2
(V
4
b
V
3
)
]
e
b
A
C
1
a
C
2
a
C
S
[
D
Q C
1
a
D
Q C
2
]
*
Comparator Reads V
TH
from Internal DAC Differentially
FIGURE 4c. Multiple Differential Inputs
9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC0858BIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0858BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851 | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC0852CCN/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Comparator |
| ADC0852CCN/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Comparator |
| ADC0854 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| ADC0854BCJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Comparator |
| ADC0854BCJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Comparator |
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