參數(shù)資料
型號: ADC08234CIMF
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號調理
英文描述: IC,QUAD,UART,FIFO
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: PLASTIC, TSSOP-24
文件頁數(shù): 10/24頁
文件大?。?/td> 419K
代理商: ADC08234CIMF
Timing Diagrams
(Continued)
ADC08231 Timing
TL/H/11015–13
*
LSB first output not available on ADC08231.
LSB information is maintained for remainder of clock periods until CS goes high.
To reset the ADC08231, CLK and CS must be simultaneusly high for a period of t
SELECT
or greater. The ADC08231 also has one extra clock period for sampling
the analog signal (t
ca
). Otherwise it is compatible with the ADC0831.
ADC08234 Timing
TL/H/11015–14
To reset the ADC08234, CLK and CS must be simultaneously high for a period of t
SELECT
or greater. The ADC08234 also has one extra clock period for sampling
the analog signal (t
ca
). Otherwise it is compatible with the ADC0834.
10
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參數(shù)描述
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