參數(shù)資料
型號: ADC081000LEVAL
廠商: National Semiconductor Corporation
英文描述: 8-Bit, 1 GSPS A/D Converter with Internal Reference and Sample-and-Hold
中文描述: 8位,1 GSPS的A / D轉換的內(nèi)部參考和采樣器和持有
文件頁數(shù): 1/3頁
文件大?。?/td> 112K
代理商: ADC081000LEVAL
ADC081000
8-Bit, 1 GSPS A/D Converter with Internal Reference and
Sample-and-Hold
General Description
NOTE: This product is currently in development. - ALL
specifications are design targets and are subject to
change.
The ADC081000 is a low power, high performance CMOS
analog-to-digital converter that digitizes signals to 8 bits
resolution at sampling rates up to 1.6 GSPS while consum-
ing a typical 1.4 Watts from a single 1.9 Volt supply at 1.0
GSPS. This device is guaranteed to have no missing codes
over the full operating temperature range. The unique
folding/interpolating architecture, the fully differential com-
parator design and the innovative design of the internal
sample-and-hold amplifier enable a very flat SINAD/ENOB
response beyond Nyquist, producing a high 7.5 ENOB with a
100 MHz input signal and a 1 GHz sample rate. Output
formatting is offset binary coding with LVDS digital outputs
compliant with IEEE 1596.3-1996, with the exception of a
reduced common mode voltage of 0.8V.
The converter has a 1:2 demultiplexer that feeds two LVDS
buses and reduces the output data rate on each bus to half
the sampling rate. The data on these buses are interleaved
in time to provide a 500 MSPS output rate per bus and a
combined output rate of 1 GSPS.
Setting the PD (Power Down) pin high places the converter
into an inactive power down state, where it typically con-
sumes less than 5 mW.
The ADC081000 is available in a 128-lead exposed pad
LQFP and operates over the industrial (-40
o
C
T
A
+85
o
C)
temperature range.
Features
n
Internal Sample-and-Hold
n
Single +1.9V
±
0.1V Operation
n
Adjustable Output Levels
n
Guaranteed No Missing Codes
n
Low Power Standby Mode
Key Specifications
n
Resolution
n
Max Conversion Rate
n
No Missing Codes
n
ENOB
@
100 MHz Input
n
DNL
n
Conversion Latency
n
PSRR
n
Power Consumption
— Operating
— Power Down Mode
8 Bits
1 GSPS (min)
Guaranteed
7.5 Bits (typ)
±
0.25 LSB (typ)
7/8 Clock Cycles
40 dB (typ)
1.4 W (typ)
5 mW (typ)
Applications
n
Direct RF Down Conversion
n
Digital Oscilloscopes
n
RADAR / SONAR / ECM
n
Satellite Set-top boxes
n
WLANs
n
Communications Systems
n
Test Instrumentation
Block Diagram
20068153
ADVANCE INFORMATION
February 2004
A
2004 National Semiconductor Corporation
DS200681
www.national.com
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