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參數(shù)資料
| 型號： | ADAV801ASTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Audio Codec for Recordable DVD |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 18/56頁 |
| 文件大?。?/td> | 1405K |
| 代理商： | ADAV801ASTZ |
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ADAV801
DAC SECTION
The ADAV801 has two DAC channels arranged as a stereo
with single-ended analog outputs. Each channel has its own
independently programmable attenuator, adjustable in 1
of 0.375 dB per step. The DAC can receive data from the
playback or auxiliary input ports, the SRC, the ADC, or the DIR.
Each analog output pin sits at a dc level of VREF, and swings
1.0 V rms for a 0 dB digital input signal. A single op amp third-
order external low-pass filter is recommen
frequency noise present on the output pins. Note that the use of
op amps with low slew rate or low bandwidth can cause high
frequency noise and tones to fold down into the audio band.
Care should be taken in selecting these components.
Rev. 0 | Page 18 of 56
pair
28 steps
ded to remove high
e noise
d
nal
op amps, which might draw more than 50 μA or have dynamic
load changes, extra buffering should be used to preserve the
quality of the ADAV801 reference.
The digital input data source for the DAC can be selected from
a number of available sources by programming the appropriate
bits in the datapath control register. Figure 27 shows how the
digital data source and the MCLK source for the DAC are
selected. Each DAC has an independent volume register giving
256 steps of control, with each step giving approximately 0.375
dB of attenuation. Note that the DACs are muted by default to
prevent unwanted pops, clicks, and other noises from appearing
on the outputs while the ADAV801 is being configured. Each
DAC also has a peak-level register that records the peak value of
the digital audio data. Reading the register clears the peak.
electing a Sample Rate
Correct operation of
provided to the DAC, the master clock applied to the DAC, and
the selected interpolation rate. By default, the DAC assumes that
the MCLK rate is 256 times the sample rate, which requires an
8-times oversampling rate. This combination is suitable for
sample rates of up to 48 kHz.
pon the data rate
S
)
by 2. This prevents the DAC engine from
running too fast. To compensate for the reduced MCLK rate, the
interpolator should be selected to operate in 4 × (DAC MCLK =
128 × f
S
). Similar combinations can be selected for different
sample rates.
S
The FILTD and FILTR pins should be bypassed by external
capacitors to AGND. The FILTD pin is used to reduce th
of the internal DAC bias circuitry, thereby reducing the DAC
output noise. The voltage at the VREF pin, FILTR, can be use
to bias external op amps used to filter the output signals. For
applications in which the FILTR is required to drive exter
the DAC is dependent u
For a 96 kHz data rate that has a 24.576 MHz MCLK (256 × f
associated with it, the DAC MCLK divider should be set to
divide the MCLK
0
P
P
M
X
REG 0x76
BITS 7–5
REG 0x65
BITS 3–2
REG 0x63
BITS 5–3
D
S
)
D
S
)
DIR
PLAYBACK
AUXILIARY IN
ADC
MCLK
DIVIDER
DAC
MCLK
DAC
DAC
INPUT
Figure 27. Clock and Datapath Control on the DAC
MULTIBIT
Σ
-
MODULATOR
INTERPOLATOR
DAC
DAC
TO ZERO FLAG PINS
FROM DAC
DATAPATH
MULTIPLEXER
VOLUME/MUTE
CONTROL
PEAK
DETECTOR
ZERO DETECT
TO CONTROL
REGISTERS
OUTPUT
0
Figure 28. DAC Block Diagram
ANALOG
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADAV801ASTZ-REEL | Audio Codec for Recordable DVD |
| ADC0800PCD | ADC0800 8-Bit A/D Converter |
| ADC0800PD | ADC0800 8-Bit A/D Converter |
| ADC0800 | ECONOLINE: REC3-S_DRW(Z)/H* - 3W DIP Package- 1kVDC Isolation- Wide Input 2:1 & 4:1- Regulated Output- 100% Burned In- UL94V-0 Package Material- Continuous Short Circiut Protection- Efficiency to 80% |
| ADC08031 | 8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, <BR> Voltage Reference, and Track/Hold Function |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADAV801ASTZ-REEL | 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADAV802AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
| ADAV802ASTZ | 制造商:Analog Devices 功能描述: |
| ADAV803 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Audio Codec for Recordable DVD |
| ADAV803AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
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