參數(shù)資料
型號: ADATE304BBCZ
廠商: Analog Devices Inc
文件頁數(shù): 30/52頁
文件大小: 0K
描述: IC DCL ATE 200MHZ DUAL 84CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: DCL
應(yīng)用: 自動(dòng)測試設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 84-TFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 84-CSPBGA(9x9)
包裝: 托盤
ADATE304
Rev. 0 | Page 36 of 52
READ OPERATION
The read operation is a two-stage operation. First, a word is
shifted in, specifying which register to read. CS is deasserted
for three clock cycles, and then a second word is shifted in to
obtain the readback data. This second word can be either
another operation or an NOP address. If another operation is
shifted in, it must shift in at least eight bits of data to read back
the previous specified data. The NOP address can be used for
this read if there is no need to read/write another register. To
maintain the clarity of the operation, it is strongly recommended
that the NOP address be used for all reads.
Any register read that is fewer than 16 bits has zeros filled in the
top bits to make it a 16-bit word.
X
READ INSTRUCTION
NOP
X
READ DATA
X
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. X = DON’T CARE.
072
79
-0
75
Figure 71. SPI Read Overview
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
X
R/W
CH[0]
ADDR[4] ADDR[3] ADDR[2] ADDR[1] ADDR[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. X = DON’T CARE.
07
27
9-
07
6
Figure 72. SPI Read—Details of Read Request
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
RDATA[2]
RDATA[1]
RDATA[15] RDATA[14]
RDATA[0]
X
R/W = 1
ADDR[4:0] = 0x00 (NOP)
CH[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. RDATA IS THE REGISTER VALUE BEING READ.
2. X = DON’T CARE.
07
27
9-
07
7
Figure 73. SPI Read—Details of Read Out
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