參數(shù)資料
型號(hào)： ADA4939-2YCPZ-R7
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 11/24頁(yè)
文件大?。?/td> 0K
描述： IC AMP DIFF DUAL ULDIST 24LFCSP
標(biāo)準(zhǔn)包裝： 1
放大器類(lèi)型： 差分
電路數(shù)： 2
輸出類(lèi)型： 差分
轉(zhuǎn)換速率： 6800 V/µs
-3db帶寬： 1.4GHz
電流 - 輸入偏壓： 10µA
電壓 - 輸入偏移： 500µV
電流 - 電源： 36.5mA
電流 - 輸出 / 通道： 100mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 5.25 V，±1.5 V ~ 2.625 V
工作溫度： -40°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 24-LFCSP-VQ（4x4）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 781 (CN2011-ZH PDF)
其它名稱(chēng)： ADA4939-2YCPZ-R7DKR
ADA4939-1/ADA4939-2
Rev. 0 | Page 19 of 24
Mismatched feedback networks also result in a degradation of
the ability of the circuit to reject input common-mode signals,
much the same as for a four-resistor difference amplifier made
from a conventional op amp.
As a practical summarization of the above issues, resistors of 1%
tolerance produce a worst-case input CMRR of approximately
40 dB, a worst-case differential-mode output offset of 25 mV
due to a 2.5 V VOCM input, negligible VOCM noise contribution,
and no significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE FOR AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
in Figure 44, the input impedance (RIN, dm) between the inputs
(+DIN and DIN) is simply RIN, dm = 2 × RG.
+VS
ADA4939
+IN
–IN
RF
+DIN
–DIN
VOCM
RG
VOUT, dm
07
42
9-
0
51
Figure 44. ADA4939 Configured for Balanced (Differential) Inputs
For an unbalanced, single-ended input signal (see Figure 45),
the input impedance is
()
+
×
=
F
G
F
G
SE
IN
R
2
1
,
ADA4939
RL VOUT, dm
+VS
–VS
RG
RF
VOCM
RIN, SE
07
42
9-
0
52
Figure 45. ADA4939 with Unbalanced (Single-Ended) Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the input resistor RG. The common-mode
voltage at the amplifier input terminals can be easily determined by
noting that the voltage at the inverting input is equal to the
noninverting output voltage divided down by the voltage divider
formed by RF and RG in the lower loop. This voltage is present at
both input terminals due to negative voltage feedback and is in
phase with the input signal, thus reducing the effective voltage
across RG in the upper loop and partially bootstrapping RG.
Terminating a Single-Ended Input
This section deals with how to properly terminate a single-
ended input to the ADA4939 with a gain of 2, RF = 400 Ω, and
RG = 200 Ω. An example using an input source with a terminated
output voltage of 1 V p-p and source resistance of 50 Ω illustrates
the four simple steps that must be followed. Note that because
the terminated output voltage of the source is 1 V p-p, the open
circuit output voltage of the source is 2 V p-p. The source shown
in Figure 46 indicates this open-circuit voltage.
1.
The input impedance must be calculated using the formula
Ω
300
)
400
200
(
2
400
1
200
)
(
2
1
=
+
×
=
+
×
=
F
G
F
G
IN
R
RS
50
VS
2V p-p
RIN
300
ADA4939
RL VOUT, dm
+VS
–VS
RG
200
RG
200
RF
400
RF
400
VOCM
074
29
-05
3
Figure 46. Calculating Single-Ended Input Impedance RIN
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