參數(shù)資料
型號: ADA4938-2ACPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 26/28頁
文件大小: 0K
描述: IC ADC DRIVER DIFF DUAL 24LFCSP
標準包裝: 1
類型: ADC 驅(qū)動器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標準包裝
產(chǎn)品目錄頁面: 765 (CN2011-ZH PDF)
其它名稱: ADA4938-2ACPZ-R7DKR
ADA4938-1/ADA4938-2
Rev. A | Page 7 of 28
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Rating
Supply Voltage
12 V
Power Dissipation
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +85°C
Lead Temperature (Soldering, 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Rating
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad) soldered
to a high thermal conductivity 4-layer circuit board, as described in
EIA/JESD 51-7. The exposed pad is not electrically connected to
the device. It is typically soldered to a pad on the PCB that is
thermally and electrically connected to an internal ground plane.
Table 6. Thermal Resistance
Package Type
θJA
Unit
16-Lead LFCSP (Exposed Pad)
95
°C/W
24-Lead LFCSP (Exposed Pad)
65
°C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4938-x
packages is limited by the associated rise in junction temper-
ature (TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4938. Exceeding a junction
temperature of 150°C for an extended period can result in changes
in the silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (VS) times the quiescent current (IS).
The power dissipated due to the load drive depends upon the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Airflow increases heat dissipation, which effectively reducing
θJA. In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θJA.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the ADA4938-1,
16-lead LFCSP (95°C/W) and the ADA4938-2, 24-lead LFCSP
(65°C/W) on a JEDEC standard 4-layer board.
3.5
2.5
3.0
2.0
1.5
1.0
0.5
0
–40 –30 –20 –10
0
102030405060708090
MA
XI
MU
M
PO
WER
D
ISS
IP
A
T
IO
N
(
W
)
AMBIENT TEMPERATURE (°C)
06
59
2-
1
03
ADA4938-1
ADA4938-2
Figure 4. Maximum Power Dissipation vs. Temperature, 4-Layer Board
ESD CAUTION
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