參數(shù)資料
型號(hào): ADA4932-1YCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 14/29頁
文件大?。?/td> 0K
描述: IC AMP DIFF LP 80MA 16LFCSP
設(shè)計(jì)資源: Single-Ended-to-Differential High Speed Drive Circuit for 16-Bit, 10 MSPS AD7626 ADC (CN0105)
標(biāo)準(zhǔn)包裝: 5,000
放大器類型: 差分
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 2800 V/µs
-3db帶寬: 560MHz
電流 - 輸入偏壓: 2.5µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 9.6mA
電流 - 輸出 / 通道: 80mA
電壓 - 電源,單路/雙路(±): 3 V ~ 11 V,±1.5 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-VQ
包裝: 帶卷 (TR)
ADA4932-1/ADA4932-2
Data Sheet
APPLICATIONS INFORMATION
ANALYZING AN APPLICATION CIRCUIT
The ADA4932-x uses high open-loop gain and negative feedback
to force its differential and common-mode output voltages in
such a way as to minimize the differential and common-mode
error voltages. The differential error voltage is defined as the
voltage between the differential inputs labeled +IN and IN
(see Figure 55). For most purposes, this voltage can be assumed
to be zero. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to VOCM can also
be assumed to be zero. Starting from these principles, any applica-
tion circuit can be analyzed.
SETTING THE CLOSED-LOOP GAIN
Using the approach described in the Analyzing an Application
Circuit section, the differential gain of the circuit in Figure 55
can be determined by
G
F
dm
IN
dm
OUT
R
V
=
,
This presumes that the input resistors (RG) and feedback resistors
(RF) on each side are equal.
ESTIMATING THE OUTPUT NOISE VOLTAGE
The differential output noise of the ADA4932-x can be
estimated using the noise model in Figure 56. The input-
referred noise voltage density, vnIN, is modeled as a differential
input, and the noise currents, inIN and inIN+, appear between
each input and ground. The output voltage due to vnIN is obtained
by multiplying vnIN by the noise gain, GN (defined in the GN
equation that follows). The noise currents are uncorrelated with
the same mean-square value, and each produces an output voltage
that is equal to the noise current multiplied by the associated
feedback resistance. The noise voltage density at the VOCM pin is
vnCM. When the feedback networks have the same feedback factor,
as is true in most cases, the output noise due to vnCM is common
mode. Each of the four resistors contributes (4kTRxx)1/2. The
noise from the feedback resistors appears directly at the output,
and the noise from the gain resistors appears at the output multip-
lied by RF/RG. Table 11 summarizes the input noise sources, the
multiplication factors, and the output-referred noise density terms.
ADA4932-x
+
RF2
VnOD
VnCM
VOCM
VnIN
RF1
RG2
RG1
VnRF1
VnRF2
VnRG1
VnRG2
inIN+
inIN–
07752-
047
Figure 56. Noise Model
Table 11. Output Noise Voltage Density Calculations for Matched Feedback Networks
Input Noise Contribution
Input Noise Term
Input Noise
Voltage Density
Output
Multiplication Factor
Differential Output Noise
Voltage Density Term
Differential Input
vnIN
GN
vnO1 = GN(vnIN)
Inverting Input
inIN
inIN × (RF2)
1
vnO2 = (inIN)(RF2)
Noninverting Input
inIN+
inIN+ × (RF1)
1
vnO3 = (inIN+)(RF1)
VOCM Input
vnCM
0
vnO4 = 0 V
Gain Resistor, RG1
vnRG1
(4kTRG1)1/2
RF1/RG1
vnO5 = (RF1/RG1)(4kTRG1)1/2
Gain Resistor, RG2
vnRG2
(4kTRG2)1/2
RF2/RG2
vnO6 = (RF2/RG2)(4kTRG2)1/2
Feedback Resistor, RF1
vnRF1
(4kTRF1)1/2
1
vnO7 = (4kTRF1)1/2
Feedback Resistor, RF2
vnRF2
(4kTRF2)1/2
1
vnO8 = (4kTRF2)1/2
Table 12. Differential Input, DC-Coupled
Nominal Gain (dB)
RF ()
RG ()
RIN, dm ()
Differential Output Noise Density (nV/√Hz)
0
499
998
9.25
6
499
249
498
12.9
10
768
243
486
18.2
Table 13. Single-Ended Ground-Referenced Input, DC-Coupled, RS = 50
Nominal Gain (dB)
RF ()
RG1 ()
RT () (Std 1%) RIN, cm ()
RG2 ()1
Differential Output Noise Density (nV/√Hz)
0
511
499
53.6
665
525
9.19
6
523
249
57.6
374
276
12.6
10
806
243
57.6
392
270
17.7
1
RG2 = RG1 + (RS||RT).
Rev. C | Page 20 of 28
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