The power dissipated in the package (PD
參數(shù)資料
型號(hào): ADA4930-1YCP-EBZ
廠商: Analog Devices Inc
文件頁數(shù): 28/29頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADA4930-1YCP
標(biāo)準(zhǔn)包裝: 1
每 IC 通道數(shù): 1 - 單
放大器類型: 差分
板類型: 裸(未填充)
已供物品:
已用 IC / 零件: 16-LFCSP 封裝
ADA4930-1/ADA4930-2
Rev. A | Page 7 of 28
ABSOLUTE MAXIMUM RATINGS
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (VS) times the quiescent current (IS).
The power dissipated due to the load drive depends upon the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Table 7.
Parameter
Rating
Supply Voltage
5.5 V
Power Dissipation
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +105°C
Lead Temperature (Soldering, 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating
only; functional operation of the device at these or any other
conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads/
exposed pad from metal traces, through holes, ground, and
power planes reduces θJA.
Figure 4 shows the maximum safe power dissipation vs. the
ambient temperature for the ADA4930-1 single 16-lead LFCSP
(98°C/W) and the ADA4930-2 dual 24-lead LFCSP (67°C/W)
on a JEDEC standard 4-layer board.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad) soldered
to a high thermal conductivity 2s2p circuit board, as described
in EIA/JESD51-7.
3.5
0
–40
110
90 100
MA
XI
MU
M
PO
WER
D
ISS
IP
A
T
IO
N
(
W
)
TEMPERATURE (°C)
0.5
1.0
1.5
2.0
2.5
3.0
–30 –20 –10 0
1020 304050 607080
ADA4930-2
ADA4930-1
09
20
9-
0
04
Table 8. Thermal Resistance
Package Type
θJA
Unit
16-Lead LFCSP (Exposed Pad)
98
°C/W
24-Lead LFCSP (Exposed Pad)
67
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4930-1/ADA4930-2
packages is limited by the associated rise in junction temperature (TJ)
on the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the ADA4930-1/ADA4930-2. Exceeding a
junction temperature of 150°C for an extended period can result
in changes in the silicon devices, potentially causing failure.
Figure 4. Maximum Power Dissipation vs. Ambient Temperature,
4-Layer Board
ESD CAUTION
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