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參數(shù)資料
| 型號： | ADA4899-1YRDZ-R7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Unity Gain Stable, Ultralow Distortion, 1 nV/ Hz Voltage Noise, High Speed Op Amp |
| 中文描述： | OP-AMP, 230 uV OFFSET-MAX, PDSO8 |
| 封裝： | ROHS COMPLIANT, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 496K |
| 代理商： | ADA4899-1YRDZ-R7 |
ADA4899-1
THEORY OF OPERATION
The ADA4899-1 is a voltage feedback op amp that combines
unity gain stability with a 1 nV/√Hz input noise. It employs a
highly linear input stage that can maintain greater than 80 dBc
(@ 2 V p-p) distortion out to 10 MHz while in a unity gain
configuration. This rare combination of low gain stability,
input referred noise, and extremely low distortion is the result
of Analog Devices proprietary op amp architecture and high
speed complementary bipolar processing technology.
Rev. A | Page 13 of 20
The simplified ADA4899-1 topology, shown in Figure 45, is a
single gain stage with a unity gain output buffer. It has over
80 dB of open-loop gain and maintains precision specifications
such as CMRR, PSRR, and offset to levels that are normally
associated with topologies having two or more gain stages.
BUFFER
gm
C
C
R1
R
L
V
OUT
0
Figure 45. ADA4899-1 Topology
A pair of internally connected diodes limits the differential
voltage between the noninverting input and the inverting input
of the ADA4899-1. Each set of diodes has two series diodes,
which are connected in antiparallel. This limits the differential
voltage between the inputs to approximately ±1.2 V. All of the
ADA4899-1 pins are ESD protected with voltage-limiting diodes
connected between both rails. The protection diodes can handle
10 mA. Currents should be limited through these diodes to 10 mA
or less by using a series limiting resistor.
PACKAGING INNOVATION
The ADA4899-1 is available in both a SOIC and a LFCSP, each
of which has a thermal pad that allows the device to run cooler,
thereby increasing reliability. To help avoid routing around this
pad in board layout, both packages have an extra output pin on
the opposite side of the packages for ease in connecting a feedback
network to the inputs. The secondary output pin also isolates
the interaction of any capacitive load on the output and the self-
inductance of the package and bond wire from the feedback
loop. While using the secondary output for feedback, inductance in
the primary output helps to isolate capacitive loads from the
output impedance of the amplifier.
Both the SOIC and LFCSP have modified pinouts to improve
heavy load second harmonic distortion performance. The intent
of both is to isolate the negative supply pin from the noninverting
input. The LFCSP accomplishes this by rotating the standard
8-lead package pinout counterclockwise by one pin. This puts
the supply pins and output pins on one side of the package and
the input pins on the other. The SOIC is slightly different with
the intent of both isolating the inputs from the supply pins and
giving the user the option of using the ADA4899-1 in a
standard SOIC board layout with little or no modification.
Taking the unused Pin 5 and making it a second negative supply
pin allows for both an input isolated layout and a traditional
layout to be supported.
DISABLE PIN
A three-state input pin is provided on the ADA4899-1 for a
high impedance disable and an optional input bias current
cancellation circuit. The high impedance output allows several
ADA4899-1s to drive the same ADC or output line time-
interleaved. Pulling the DISABLE pin low activates the high
impedance state. See Table 7 for threshold levels. When the
DISABLE pin is left floating (open), the ADA4899-1 operates
normally. With the DISABLE pin pulled within 0.7 V of the
positive supply, an optional input bias current cancellation
circuit is turned on, which lowers the input bias current to less
than 200 nA. In this mode, the user can drive the ADA4899-1
from a high dc source impedance and still maintain minimal
output-referred offset without having to use impedance
matching techniques. In addition, the ADA4899-1 can be
ac-coupled while setting the bias point on the input with a high
dc impedance network. The input bias current cancellation
circuit doubles the input referred current noise, but this effect is
minimal as long as the wideband impedances are kept low (see
Figure 16).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADA4899-1YRDZ-RL | 功能描述:IC OPAMP VF ULN ULDIST 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準包裝:50 系列:LinCMOS™ 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.05 V/µs 增益帶寬積:110kHz -3db帶寬:- 電流 - 輸入偏壓:0.7pA 電壓 - 輸入偏移:210µV 電流 - 電源:57µA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):3 V ~ 16 V，±1.5 V ~ 8 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:管件 產(chǎn)品目錄頁面:865 (CN2011-ZH PDF) 其它名稱:296-1834296-1834-5 |
| ADA4922-1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC |
| ADA4922-1ACP-EBZ | 功能描述:BOARD EVAL FOR ADA4922-1ACP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 運算放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:1 系列:- |
| ADA4922-1ACPZ-R2 | 功能描述:IC ADC DRIVER 18BIT DIFF 8-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| ADA4922-1ACPZ-R7 | 制造商:Analog Devices 功能描述:SP AMP DIFF LINE DRVR AMP SGL R-R O/P 26V 8LFCSP EP - Bulk |
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