參數(shù)資料
型號(hào): ADA4898-2YRDZ-R7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/20頁(yè)
文件大小: 0K
描述: IC OPAMP VF 65MHZ DL LN 8SOIC
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 55 V/µs
-3db帶寬: 65MHz
電流 - 輸入偏壓: 100nA
電壓 - 輸入偏移: 20µV
電流 - 電源: 7.9mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 16.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm Width)裸露焊盤
供應(yīng)商設(shè)備封裝: 8-SOIC-EP
包裝: 帶卷 (TR)
ADA4898-1/ADA4898-2
Data Sheet
Rev. D | Page 14 of 20
THEORY OF OPERATION
The ADA4898 is a voltage feedback op amp that combines unity
gain stability with 0.9 nV/√Hz input noise. It employs a highly
linear input stage that can maintain greater than 90 dBc (at
2 V p-p) distortion out to 600 kHz while in a unity-gain
configuration. This rare combination of unity gain stability, low
input-referred noise, and extremely low distortion is the result
of Analog Devices, Inc., proprietary op amp architecture and
high voltage bipolar processing technology.
The simplified ADA4898 topology, shown in Figure 44, is a
single gain stage with a unity gain output buffer. It has over 100 dB
of open-loop gain and maintains precision specifications, such
as CMRR, PSRR, and offset, to levels that are normally associated
with topologies having two or more gain stages.
BUFFER
gm
CC
R1
RL
VOUT
07
03
7-
0
41
Figure 44. Topology
PD (POWER-DOWN) PIN FOR THE ADA4898-1
The PD pin saves power by decreasing the quiescent power
dissipated in the device. It is very useful when power is an issue
and the device does not need to be turned on at all times. The
response of the device is rapid when going from power-down
mode to full power operation mode. Note that PD does not put
the output in a high-Z state, which means that the ADA4898
is not recommended for use as a multiplexer. Leaving the PD
pin floating keeps the amplifier in full power operation mode.
Table 7. Power-Down Voltage Control
PD Pin
±15 V
±10 V
±5 V
Power-Down Mode
≤14 V
≤9 V
≤4 V
0.1 Hz TO 10 Hz NOISE
Figure 45 shows the 0.1 Hz to 10 Hz voltage and current noise
of the ADA4898. The peak-to-peak noise voltage is below 0.5 μV.
Figure 46 shows the circuit used to measure the low frequency
noise. It uses a band-pass filter of approximately 0.1 Hz and 10 Hz
and a high gain stage feeding into an instrumentation amplifier.
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
02
4
6
8
10
12
14
16
18
20
TIME (s)
O
U
T
PU
T
VO
L
T
A
G
E
(
V
)
07
03
7-
0
47
Figure 45. 0.1 Hz to 10 Hz Noise
DUT
ADA4898-1
+IN
–IN
1F
10nF
50
+IN
–IN
AD743
–VS = –9V
+VS = +9V
1F
15.8k
13k
13
MOMENTARY
1k
806k
7805
7905
+VS = +9V
(BATTERY)
–VS = –9V
(BATTERY)
+VR = +5V
–VR = –5V
+VR = +5V
–VR = –5V
AD620
RG
–IN
+IN
–VS
RG
+VS
OUTPUT
REF
R = 5.36k, GAIN APPROX. 10
10nF
1
2
4
3
8
7
5
6
10nF
+VS = +9V
–VS = –9V
FLOATING SHIELD
COAX
TEK
TDS 754A SCOPE
IN
FARADAY CAGE
07
037
-04
8
OUT
Figure 46. Low Frequency Noise Circuit
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