參數(shù)資料
型號： AD9942BBCZRL
廠商： Analog Devices Inc
文件頁數(shù)： 1/36頁
文件大小： 0K
描述： IC PROCESSOR SGNL 14B 100CSPBGA
標(biāo)準(zhǔn)包裝： 2,000
類型： CCD 信號處理器，14 位
應(yīng)用： 數(shù)碼相機(jī)
安裝類型： 表面貼裝
封裝/外殼： 100-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 100-CSBGA（9x9）
包裝： 帶卷 (TR)
Dual-Channel, 14-Bit CCD Signal Processor
with Precision Timing Core
AD9942
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
40 MHz correlated double sampler (CDS)
0 dB to 18 dB, 9-bit variable gain amplifier (VGA)
40 MSPS analog-to-digital converter (ADC)
Optical black clamp (CLPOB) with variable level control
Complete on-chip timing driver
Precision Timing core with <550 ps resolution
On-chip 3 V horizontal and RG drivers
4-phase H-clock mode
100-lead, 9 mm × 9 mm, CSP_BGA package
APPLICATIONS
Signal processor for dual-channel CCD outputs
Digital still cameras
Digital video cameras
High speed digital imaging applications
GENERAL DESCRIPTION
The AD9942 is a highly integrated dual-channel CCD signal
processor for digital still camera applications. Each channel is
specified at pixel rates of up to 40 MHz. The AD9942 consists of
a complete analog front end with analog-to-digital conversion,
combined with a programmable timing driver. The Precision
Timing core allows high speed clocks to be adjusted with
550 ps resolution.
The analog front end uses black level clamping and includes a
VGA, a 40 MSPS ADC, and a CDS. The timing driver provides
the high speed CCD clock drivers for RG_A and RG_B, as well
as the H1A to H4A and H1B to H4B outputs. The 6-wire serial
interface is used to program the AD9942.
Available in a space-saving, 9 mm × 9 mm, CSP_BGA package,
the AD9942 is specified over an operating temperature range of
25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
05
24
0-
00
1
AD9942
SYNC
GENERATOR
PRECISION
TIMING
CORE
INTERNAL CLOCKS
HORIZONTAL
DRIVERS
RG_B
RG_A
H1A TO H4A
4
H1B TO H4B
4
HD_A VD_A HD_B VD_B
INTERNAL
REGISTERS
SL_A SDATA_A SL_B SDATA_B
SCK_A
SCK_B
CLI_A
CLI_B
CLAMP
DOUT_A
CCDIN_A
0dB
~ 18dB
VGA
ADC
CDS
14
CLAMP
DOUT_B
CCDIN_B
0dB
~ 18dB
VGA
ADC
CDS
14
REFT_B REFB_B
VREF_B
REFT_A REFB_A
VREF_A
Figure 1.
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