參數(shù)資料
型號(hào): AD9854AST
廠商: ANALOG DEVICES INC
元件分類: XO, clock
英文描述: CMOS 300 MHz Quadrature Complete-DDS
中文描述: PLL FREQUENCY SYNTHESIZER, 200 MHz, PQFP80
封裝: MS-026BEC, LQFP-80
文件頁數(shù): 1/44頁
文件大?。?/td> 433K
代理商: AD9854AST
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD9854
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
CMOS 300 MHz Quadrature
Complete-DDS
FUNCTIONAL BLOCK DIAGRAM
AD9854
DIGITAL
MULTIPLIERS
SYSTEM
CLOCK
12-BIT CONTROL
DAC DATA
DAC R
SET
PHASE/OFFSET
MODULATION
INV.
SINC
FILTER
P
A
F
A
14OFFSET/
MODULATION
48-BIT
TFREQUENCY
FREQUENCY TUNING WORD/PHASE WORD
MULTIPLEXER AND RAMP START STOP LOGIC
PROGRAMMABLE RATE
AND UPDATE CLOCKS
COMPARATOR
PROGRAMMING REGISTERS
4
–20
3
REF CLK
MULTI-
PLEXER
DIFF/SINGLE
SELECT
REFERENCE
CLOCK IN
FSK/BPSK/HOLD
DATA IN
BIDIRECTIONAL
I/O UPDATE
READ
WRITE
SERIAL/PARALLEL
SELECT
6-BIT ADDRESS
OR SERIAL
PROGRAMMING
LINES
8-BIT PARALLEL
LOAD
MASTER
RESET
+V
S
GND
CLOCK OUT
ANALOG IN
SHAPED
ON/OFF KEYING
ANALOG OUT
ANALOG OUT
300MHz
DDS
I/O PORT BUFFERS
1AM
MOD
RAMP-UP/-DOWN
CLOCK/LOGIC
AND
MULTIPLEXER
S
C
I
Q
INV.
SINC
FILTER
12-BIT
"Q" OR
CONTROL DAC
MUX
12-BIT "I"
DAC
FEATURES
300 MHz Internal Clock Rate
Integrated 12-Bit Output DAC
Ultrahigh-Speed, 3 ps RMS Jitter Comparator
Excellent Dynamic Performance: 80 dB SFDR @ 100 MHz
(
6
1 MHz) A
OUT
4
3
to 20
3
Programmable Reference Clock Multiplier
Dual 48-Bit Programmable Frequency Registers
Dual 14-Bit Programmable Phase Offset Registers
12-Bit Amplitude Modulation and Programmable
Shaped On/Off Keying Function
Single Pin FSK and PSK Data Interface
Linear or Nonlinear FM Chirp Functions with Single
Pin Frequency “Hold” Function
Frequency-Ramped FSK
<25 ps RMS Total Jitter in Clock Generator Mode
Automatic Bidirectional Frequency Sweeping
SIN(x)/x Correction
Simplified Control Interface
10 MHz Serial, 2-Wire or 3-Wire SPI-Compatible or
100 MHz Parallel 8-Bit Programming
3.3 V Single Supply
Multiple Power-Down Functions
Single-Ended or Differential Input Reference Clock
Small 80-Lead LQFP Packaging
APPLICATIONS
Agile, Quadrature L.O. Frequency Synthesis
Programmable Clock Generator
FM Chirp Source for Radar and Scanning Systems
Test and Measurement Equipment
Commercial and Amateur RF Exciter
GENERAL DESCRIPTION
The AD9854 digital synthesizer is a highly integrated device
that uses advanced DDS technology, coupled with two internal
high-speed, high-performance quadrature D/A converters and a
comparator to form a digitally-programmable I and Q synthesizer
function. When referenced to an accurate clock source, the
AD9854 generates highly stable, frequency-phase-amplitude-
programmable sine and cosine outputs that can be used as an
agile L.O. in communications, radar, and many other applications.
The AD9854’s innovative high-speed DDS core provides 48-bit
frequency resolution (1 microHertz tuning steps). Phase trunca-
tion to 17 bits assures excellent SFDR. The AD9854’s circuit
(
continued on page 14)
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