參數(shù)資料
型號: AD9834BRU-REEL
廠商: Analog Devices Inc
文件頁數(shù): 23/32頁
文件大?。?/td> 0K
描述: IC DDS 10BIT 50MHZ LP 20-TSSOP
產(chǎn)品培訓模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設計資源: Amplitude Control Circuit for AD9834 Waveform Generator (CN0156)
標準包裝: 2,500
分辨率(位): 10 b
主 fclk: 50MHz
調(diào)節(jié)字寬(位): 28 b
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 帶卷 (TR)
Data Sheet
AD9834
REVISION HISTORY
3/14—Rev. C to Rev. D
Changes to Table 3 ............................................................................7
Deleted Evaluation Board Section ................................................29
Changes to Ordering Guide...........................................................35
2/11—Rev. B to Rev. C
Changes to IDD Parameter, Table 1 ..................................................5
Changes to FS ADJUST Description, Table 4................................8
Added Output Voltage Compliance Section................................17
Changes to Figure 31 ......................................................................23
Changes to Figure 32 ......................................................................24
Deleted Using the AD9834 Evaluation Board Section and the
Prototyping Area Section ...............................................................28
Added System Development Platform Section, AD9834 to
SPORT Interface Section, Figure 39, and Figure 40;
Renumbered Sequentially ..............................................................29
Changes to XO vs. External Clock Section and Power Supply
Section ..............................................................................................29
Deleted Bill of Materials, Table 19;
Renumbered Sequentially ..............................................................30
Added Evaluation Board Schematics Section and Figure 41 ....30
Added Figure 42 ..............................................................................31
Added Evaluation Board Layout Section and Figure 43............32
Added Figure 44 ..............................................................................33
Added Figure 45 ..............................................................................34
Changes to Ordering Guide...........................................................35
4/10—Rev. A to Rev. B
Changes to Comparator Section ...................................................15
Added Figure 28 ..............................................................................16
Changes to Serial Interface Section ..............................................17
8/06—Rev. 0 to Rev. A
Updated Format ................................................................. Universal
Changed to 75 MHz Complete DDS ............................... Universal
Changes to Features Section............................................................1
Changes to Table 1 ............................................................................4
Changes to Table 2 ............................................................................6
Changes to Table 3 ............................................................................8
Added Figure 10, Figures Renumbered Sequentially...................9
Added Figure 16 and Figure 17, Figures Renumbered
Sequentially......................................................................................10
Changes to Table 6 ..........................................................................19
Changes to Writing a Frequency Register Section .....................20
Changes to Figure 29 ......................................................................21
Changes to Table 19 ........................................................................30
Changes to Figure 38 ......................................................................28
2/03—Revision 0: Initial Version
Rev. D | Page 3 of 32
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