參數(shù)資料
型號： AD9814KR
廠商： ANALOG DEVICES INC
元件分類： 模擬信號調(diào)理
英文描述： Complete 14-Bit CCD/CIS Signal Processor
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO28
封裝： 0.300 INCH, SOIC-28
文件頁數(shù)： 2/15頁
文件大?。?/td> 160K
代理商： AD9814KR
REV. 0
–2–
AD9814–SPECIFICATIONS
ANALOG SPECIFICATIONS
2 MHz, PGA Gain = 1, Input Range = 4 V, unless otherwise noted.)
J-Grade
Min
K-Grade
Min
Parameter
Typ
Max
Typ
Max
Units
CONVERSION RATE
3-Channel Mode with CDS
1-Channel Mode with CDS
ACCURACY (Entire Signal Path)
ADC Resolution
Integral Nonlinearity
1
(INL)
INL @ 10 MHz
Differential Nonlinearity (DNL)
DNL @ 10 MHz
No Missing Codes Guaranteed
Offset Error
Gain Error
2
ANALOG INPUTS
Input Signal Range
3
Allowable Reset Transient
3
Input Limits
4
Input Capacitance
Input Bias Current
AMPLIFIERS
PGA Gain at Minimum
PGA Gain at Maximum
PGA Resolution
PGA Monotonicity
Programmable Offset at Minimum
Programmable Offset at Maximum
Programmable Offset Resolution
Programmable Offset Monotonicity
NOISE AND CROSSTALK
Input Referred Noise @ PGA Min
Total Output Noise @ PGA Min
Input Referred Noise @ PGA Max
Total Output Noise @ PGA Max
Channel-Channel Crosstalk
POWER SUPPLY REJECTION
AVDD = +5 V
±
0.25 V
Differential VREF
(@ +25
°
C)
CAPT-CAPB (4 V Input Range)
CAPT-CAPB (2 V Input Range)
TEMPERATURE RANGE
Operating
Storage
POWER SUPPLIES
AVDD
DRVDD
Total Operating Current
AVDD
DRVDD
Power-Down Mode Current
Power Dissipation
Power Dissipation @ 10 MHz
Power Dissipation (1-Channel Mode)
6
6
10
7
6
6
10
7
MSPS
MSPS
14
+2.5/–6.0
+4.0/–7.0
+0.6/–0.5
+0.8/–0.6
14
+2.5/–6.0
+4.0/–7.0
+0.6/–0.5
+0.8/–0.6
Bits
LSB
LSB
LSB
LSB
Bits
mV
% FSR
±
11.0
±
1.0
13
14
–12
2.2
–12
2.2
±
104
±
5.3
4.0
1.0
4.0
1.0
V p-p
V
V
pF
nA
AVSS – 0.3
AVDD + 0.3
AVSS – 0.3
AVDD + 0.3
10
10
10
10
1
5.8
64
1
5.8
64
V/V
V/V
Steps
Guaranteed
–300
+300
512
Guaranteed
Guaranteed
–300
+300
512
Guaranteed
mV
mV
Steps
130
0.55
84
2.0
<1
130
0.55
84
2.0
<1
μ
V rms
LSB rms
μ
V rms
LSB rms
LSB
0.07
0.07
0.3
% FSR
2.0
1.0
1.9
0.94
2.0
1.0
2.1
1.06
V
V
0
–65
+70
+150
0
–65
+70
+150
°
C
°
C
+4.75
+3.0
+5.0
+5.0
+5.25
+5.25
+4.75
+3.0
+5.0
+5.0
+5.25
+5.25
V
V
64
1.8
150
330
355
220
64
1.8
150
330
355
220
80
10
mA
mA
μ
A
mW
mW
mW
450
265
(T
MIN
to T
MAX
, AVDD = +5 V, DRVDD = +5 V, 3-Channel CDS Mode, f
ADCCLK
= 6 MHz, f
CDSCLK1
= f
CDSCLK2
=
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