參數(shù)資料
型號: AD9807
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP64
封裝: PLASTIC, QFP-64
文件頁數(shù): 7/24頁
文件大小: 240K
代理商: AD9807
AD9807/AD9805
–7–
REV. 0
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9807/AD9805 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUT E MAX IMUM RAT INGS*
With
Respect
to
Parameter
Min
Max
Units
AVDD
AVSS
DVDD
AGND
AVDD
Clock Input
Digital Outputs
AIN, VREF
Junction T emperature
Storage T emperature
Lead T emperature (10 sec)
AVSS
AVDD
DVSS
DVSS
DVDD
DVSS
DVSS
AVSS
–0.5
–6.5
–0.5
–0.3
–6.5
–0.5
–0.5
–0.3
+6.5
+0.5
+6.5
+0.3
+6.5
DVDD + 0.5 Volts
AVDD + 0.3 Volts
AVDD + 0.3 Volts
+150
+150
+300
Volts
Volts
Volts
Volts
Volts
°
C
°
C
°
C
–65
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
ORDE RING GUIDE
T emperature
Range
Package
Description
Package
Option*
Model
AD9807JS
AD9805JS
0
°
C to +70
°
C
0
°
C to +70
°
C
PQFP
PQFP
S-64
S-64
*S = Plastic Quad Flatpack.
DE FINIT IONS OF SPE CIFICAT IONS
INT E GRAL NONLINE ARIT Y
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” through “positive
full scale.” T he point used as “negative full scale” occurs
1/2 LSB
before the first code transition. “Positive full scale” is defined as a
level 1 1/2 LSB beyond the last code transition. T he deviation is
measured from the middle of each particular code to the true
straight line.
DIFFE RE NT IAL LINE ARIT Y E RROR (DNL, NO MISSING
CODE S)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. T hus every
code must have a finite width. Guaranteed no missing codes
to 12-bit resolution indicates that all 4096 codes, respectively,
must be present over all operating ranges.
UNIPOLAR OFFSE T E RROR
In the unipolar mode, the first transition should occur at a level
1/2 LSB above analog common. Unipolar offset is defined as
the deviation of the actual from that point. T he unipolar offset
temperature coefficient specifies the maximum change of the
transition point over temperature, with or without external
adjustments.
GAIN E RROR
T he last transition should occur for an analog value 1 1/2 LSB
below the nominal full scale. Gain error is the deviation of the
actual difference between first and last code transitions and the
ideal difference between first and last code transitions.
POWE R SUPPLY RE JE CT ION
Power Supply Rejection specifies the maximum full-scale change
from the initial value with the supplies at the various limits.
APE RT URE DE LAY
Aperture delay is a timing measurement between the sampling
clocks and the CDS. It is measured from the falling edge of the
CDSCLK 2 input to when the input signal is held for conversion
in CDS mode. In non-CDS mode, it is the falling edge of
CDSCLK 1.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9807JS 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors
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AD9808JST 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel
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