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參數(shù)資料
| 型號： | AD9803 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CCD And Video Signal Processor For Electronic Cameras(電子照相機的CCD信號和視頻信號處理器) |
| 中文描述： | CCD及視頻信號處理器電子相機（電子照相機的防治荒漠化公約信號和視頻信號處理器） |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 105K |
| 代理商： | AD9803 |
AD9803
–9–
REV. PrA
Clamp Level
DT
REGISTER DESCRIPTION
(a) A-REGISTER: Modes of Operation
a1
a0
Modes
0
0
1
1
0
1
0
1
ADC-MODE
AUX-MODE
CCD-MODE
CCD-MODE
(b) B-REGISTER: Output Modes
b1
b0
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
0
1
1
0
1
0
1
Normal
0
1
High Impedance
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
(c) C-REGISTER: Clock Modes
c1
c0
SHP-SHD Clock Pulses
Clamp Active Pulses
0
0
1
1
0
1
0
1
Active Low
Active Low
Active High
Active High
Active Low
Active High
Active Low
Active High
(d) D-REGISTER: Power-Down Modes
Modes
d1
d0 Description
Normal
Power-Down 1
Power-Down 2
0
0
1
0
1
0
Normal Operation
Stand-By Mode (Fast Recovery)
Reference Stand-By (Same Mode
as STBY Pin 18)
Total Shut-Down
Power-Down 3
1
1
(e) E-REGISTER: Clamp Level Selection
e1
e0
CLP(0)
CLP(1)
CLP(2)
CLP(3)
0
0
1
1
0
1
0
1
32 LSBs
48 LSBs
64 LSBs
16 LSBs
(f) F-REGISTER: PGA Gain Selection
f9 f8 f7 f6 f5 f4 f3 f2 f1 f0
CCD-Gain
Gain(0)
Gain(1)
. . .
Gain(1022) 1 1 1 1 1 1 1 1 1 0
Gain(1023) 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1
0.00 dB
0.03 dB
. . .
29.97 dB
30.0 dB
(f) F-REGISTER: PGA Gain Selection
f9 f8 f7 f6 f5 f4 f3 f2
AUX-Gain
Gain(0)
Gain(1)
. . .
Gain(254)
Gain(255)
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0.00 dB
0.04 dB
. . .
9.96 dB
10.00 dB
1 1 1 1 1 1 1 0
1 1 1 1 1 1 1 1
(g) G-REGISTER: DAC1 Input
g7 g6 g5 g4 g3 g2 g1 g0
DAC1 Output*
Code(0)
Code(1)
. . .
Code(254)
Code(255)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0 V
0.012 V
. . .
2.988 V
3.0 V
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
(h) H-REGISTER: DAC2 Input
h7 h6 h5 h4 h3 h2 h1 h0
DAC2 Output*
Code(0)
Code(1)
. . .
Code(254)
Code(255)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0 V
0.012 V
. . .
2.988 V
3.0 V
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
(j) J-REGISTER: Even-Odd Offset Correction
j0
Even-Odd Offset Correction
0
1
Offset Correction In Use
Offset Correction Not Used
(k) K-REGISTER: External PGA Gain Control
k0
PGA Gain Control
0
External Voltage Control Through AUXCONT or
PGACONT1 and PGACONT2
Internal 10-Bit DAC Control of PGA Gain
1
(m) M-REGISTER: DAC1 & DAC2 pdn
m0
Power Down of 28-Bit DACs
0
1
8-Bit DACs Powered-Down
8-Bit DACs Operational
*VDD = 3 V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AD9803JST | 制造商:Rochester Electronics LLC 功能描述: |
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| AD9803JSTRL-28 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9804 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit 18 MSPS CCD Signal Processor |
| AD9804AJST | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MHZ NO PXGA - Tape and Reel |
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