參數(shù)資料
型號: AD9776ABSVZ
廠商: Analog Devices Inc
文件頁數(shù): 40/56頁
文件大?。?/td> 0K
描述: IC DAC 12BIT 1.0GSPS 100TQFP
產(chǎn)品培訓模塊: DAC Architectures
標準包裝: 1
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 300mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應商設備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 1G
產(chǎn)品目錄頁面: 785 (CN2011-ZH PDF)
AD9776A/AD9778A/AD9779A
Rev. B | Page 45 of 56
RBIP
50
RBIN
50
93
90
92
21
22
IBBN
IBBP
AD9779A
RBQN
50
RBQP
50
84
87
89
83
86
9
10
RSLI
100
RSLQ
100
OUT1_N
AUX1_N
AUX2_N
OUT1_P
AUX1_P
OUT2_P
AUX2_P
OUT2_N
QBBP
QBBN
LPI
390nH
LNI
390nH
82pF
C1I
39pF
C2I
LNQ
390nH
LPQ
390nH
82pF
C3Q
39pF
C2Q
250
500
250
82pF
C3I
82pF
C1Q
06
452
-09
3
Figure 79. Typical Use of Auxiliary DACs AC Coupling to
Quadrature Modulator
LO FEEDTHROUGH COMPENSATION
The LO feedthrough compensation is the most complex of all
three operations. This is due to the structure of the offset aux-
iliary DACs, as shown in Figure 78. To achieve LO feedthrough
compensation in a circuit, each of four outputs of these auxiliary
DACs can be connected through a 500 Ω resistor to ground
and through a 250 Ω resistor to one of the four quadrature
modulator signal inputs. The purpose of these connections is
to drive a very small amount of current into the nodes at the
quadrature modulator inputs, therefore adding a slight dc bias
to one of the quadrature modulator signal inputs.
To achieve LO feedthrough compensation, the user should start
with the default conditions of the auxiliary DAC sign registers,
and then increment the magnitude of one or the other auxiliary
DAC output currents. While this is being done, the amplitude of
the LO feedthrough at the quadrature modulator output should
be sensed. If the LO feedthrough amplitude increases, try either
changing the sign of the auxiliary DAC being adjusted or
adjusting the output current of the other auxiliary DAC. It may
take practice before an effective algorithm is achieved.
Using the AD9776A/AD9778A/AD9779A evaluation board, the
LO feedthrough can typically be adjusted down to the noise
floor, although this is not stable over temperature.
RESULTS OF GAIN AND OFFSET CORRECTION
The results of gain and offset correction can be seen in Figure 80
and Figure 81. Figure 80 shows the output spectrum of the quad-
rature demodulator before gain and offset correction. Figure 81
shows the output spectrum after correction. The LO feedthrough
spur at 2.1 GHz has been suppressed to the noise level. This
result can be achieved by applying the correction, but the correc-
tion needs to be repeated after a large change in temperature.
Note that the gain matching improved the negative frequency
image rejection, but there is still a significant image present.
The remaining image is now due to phase mismatch in the
quadrature modulator. Phase mismatch can be distinguished
from gain mismatch by the shape of the image. Note that the
image in Figure 80 is relatively flat and the image in Figure 81
slopes down with frequency. Phase mismatch is frequency
dependent, so an image dominated by phase mismatch has
this sloping characteristic.
06
45
2-
3
04
SPAN 200MHz
CENTER 2.1GHz
REF LVL
0dBm
20MHz
0
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
RBW
3kHz
REF ATT
30dB
VBW
3kHz
MIXER
–40dBm
SWT
56s
UNIT
dBm
Figure 80. AD9779A and ADL5372 with a Multitone Signal at 2.1 GHz,
No Gain or LO Compensation
06
45
2-
30
5
SPAN 200MHz
CENTER 2.1GHz
REF LVL
0dBm
20MHz
0
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
RBW
20kHz
REF ATT
20dB
VBW
20kHz
MIXER
–40dBm
SWT
1.25s
UNIT
dBm
Figure 81. AD9779A and ADL5372 with a Multitone Signal at 2.1 GHz,
Gain and LO Compensation Optimized
相關PDF資料
PDF描述
MS27656E25B29SB CONN RCPT 29POS WALL MNT W/SCKT
VE-27Y-MY-F3 CONVERTER MOD DC/DC 3.3V 33W
VE-J1L-MZ-F4 CONVERTER MOD DC/DC 28V 25W
M83723/84G1415N CONN RCPT 15POS JAM NUT W/SCKT
MS3450W32-13SZ CONN RCPT 23POS WALL MNT W/SCKT
相關代理商/技術參數(shù)
參數(shù)描述
AD9776ABSVZRL 功能描述:DAC 12BIT 1.0GSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應商設備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k
AD9776A-DPG2-EBZ 功能描述:BOARD EVALUATION FOR AD9776A RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:* 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
AD9776A-EBZ 制造商:Analog Devices 功能描述:Dual 12 /14 /16 Bit, 1 GSPS, Digital To Analog Converters Development Kit 制造商:Analog Devices 功能描述:DUAL 16B, 1.0 GSPS TXDAC - Bulk
AD9776BSVZ 功能描述:IC DAC 12BIT DUAL 1GSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應商設備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k
AD9776BSVZRL 功能描述:IC DAC 12BIT DUAL 1GSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應商設備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k