參數(shù)資料
型號: AD9772AST
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 14-Bit, 150 MSPS TxDAC⑩ with 2x Interpolation Filter
中文描述: PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, 14-BIT DAC, PQFP48
封裝: PLASTIC, LQFP-48
文件頁數(shù): 2/30頁
文件大小: 340K
代理商: AD9772AST
REV. 0
–2–
AD9772–SPECIFICATIONS
DC SPECIFICATIONS
Parameter
(T
MIN
to T
MAX
, AVDD = +3 V, CLKVDD = +3 V, PLLVDD = 0 V, DVDD = +3 V, I
OUTFS
= 20 mA, unless otherwise
noted)
Min
Typ
Max
Units
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
Monotonicity (12-Bit)
14
Bits
±
3.5
±
2.0
LSB
LSB
Guaranteed Over Specified Temperature Range
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
–0.025
–2
–5
+0.025
+2
+5
% of FSR
% of FSR
% of FSR
mA
V
k
pF
±
0.5
±
1.5
20
–1.0
+1.25
200
3
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
1.14
1.20
1
1.26
V
μ
A
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance (REFLO = 3 V)
Small Signal Bandwidth
0.1
1.25
V
M
MHz
10
0.5
TEMPERATURE COEFFICIENTS
Unipolar Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
0
±
50
±
100
±
50
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm/
°
C
POWER SUPPLY
AVDD
Voltage Range
Analog Supply Current (I
AVDD
)
Analog Supply Current in SLEEP Mode (I
AVDD
)
PLLVDD
4
Voltage Range
PLL Clock Multiplier Supply Current (I
PLLVDD
)
CLKVDD
Voltage Range
Clock Supply Current (I
CLKVDD
)
DVDD
5
Voltage Range
Digital Supply Current (I
DVDD
)
Nominal Power Dissipation
5
Power Supply Rejection Ratio (PSRR)
6
– AVDD
Power Supply Rejection Ratio (PSRR)
6
– DVDD
2.7
3.0
34
4.3
3.6
37
6
V
mA
mA
2.7
3.0
4.5
3.6
6
V
mA
2.7
3.0
5.5
3.6
7
V
mA
2.7
3.0
29
205
3.6
33
231
+0.6
+0.025
V
mA
mW
% of FSR/V
% of FSR/V
°
C
–0.6
–0.025
OPERATING RANGE
–40
+85
NOTES
1
Measured at IOUTA driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32
×
the I
REF
current.
3
Use an external amplifier to drive any external load.
4
Measured at f
DATA
= 100 MSPS and f
OUT
= 1 MHz, PLLVDD = 3.0 V.
5
Measured at f
DATA
= 50 MSPS and f
OUT
= 1 MHz.
6
Measured over a 2.7 V to 3.6 V range.
Specifications subject to change without notice.
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