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參數(shù)資料
| 型號： | AD9772A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 14-Bit, 160 MSPS TxDAC+ with 2x Interpolation Filter |
| 中文描述： | 14位，160 MSPS的TxDAC系列的2倍插值濾波器 |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 596K |
| 代理商： | AD9772A |
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REV. A
–2–
AD9772A–SPECIFICATIONS
DC SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
Monotonicity (12-Bit)
14
Bits
±
3.5
±
2.0
LSB
LSB
Guaranteed Over Specified Temperature Range
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
–0.025
–2
–5
+0.025
+2
+5
% of FSR
% of FSR
% of FSR
mA
V
k
pF
±
0.5
±
1.5
20
–1.0
+1.25
200
3
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
1.14
1.20
1
1.26
V
μ
A
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance (REFLO = 3 V)
Small Signal Bandwidth
0.1
1.25
V
m
MHz
10
0.5
TEMPERATURE COEFFICIENTS
Unipolar Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
0
±
50
±
100
±
50
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm/
°
C
POWER SUPPLY
AVDD
Voltage Range
Analog Supply Current (I
AVDD
)
Analog Supply Current in SLEEP Mode (I
AVDD
)
DVDD1, DVDD2
Voltage Range
Digital Supply Current (I
DVDD1
+ I
DVDD2
)
CLKVDD, PLLVDD
4
(PLLVDD = 3.0 V)
Voltage Range
Clock Supply Current (I
CLKVDD
+ I
PLLVDD
)
CLKVDD (PLLVDD = 0 V)
Voltage Range
Clock Supply Current (I
5
)
Nominal Power Dissipation
Power Supply Rejection Ratio (PSRR)
6
– AVDD
Power Supply Rejection Ratio (PSRR)
6
– DVDD
3.1
3.3
34
4.3
3.5
37
6
V
mA
mA
3.1
3.3
37
3.5
40
V
mA
3.1
3.3
25
3.5
30
V
mA
3.1
3.3
6.0
253
3.5
V
mA
mW
% of FSR/V
% of FSR/V
°
C
272
+0.6
+0.025
–0.6
–0.025
OPERATING RANGE
–40
+85
NOTES
1
Measured at I
OUTA
driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32
3
Use an external amplifier to drive any external load.
4
Measured at f
DATA
= 100 MSPS and f
OUT
= 1 MHz, DIV1, DIV0 = 0 V.
5
Measured with PLL enabled at f
DATA
= 50 MSPS and f
OUT
= 1 MHz.
6
Measured over a 3.0 V to 3.6 V range.
Specifications subject to change without notice.
the I
REF
current.
(T
MIN
to T
MAX
, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 0 V, DVDD = 3.3 V, I
OUTFS
= 20 mA, unless otherwise noted.)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD9772AAST | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 14-bit 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:14BIT 160 MSPS TXDAC+ W/2X INTERPOLATION - Tape and Reel 制造商:Analog Devices 功能描述:Digital-Analog Converter IC Number of Bi |
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| AD9772AASTZ | 功能描述:IC DAC 14BIT 160MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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