參數(shù)資料
型號: AD9767ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 4/44頁
文件大?。?/td> 0K
描述: IC DAC 14BIT DUAL 125MSPS 48LQFP
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 2,000
系列: TxDAC+®
設(shè)置時(shí)間: 35ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 450mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 125M
配用: AD9767-EBZ-ND - BOARD EVAL FOR AD9767
AD9763/AD9765/AD9767
Data Sheet
Rev. G | Page 12 of 44
55
85
60
70
65
75
80
5.91MHz/65MSPS
11.37MHz/125MSPS
910kHz/10MSPS
2.27MHz/25MSPS
S
F
DR
(
d
Bc)
–20
–16
–12
–8
–4
0
AOUT (dBFS)
0
06
17
-01
2
Figure 12. Single-Tone SFDR vs. AOUT @ fOUT = fCLK/11
60
80
65
70
55
75
85
S
F
DR
(
d
B
c)
–20
–16
–12
–8
–4
0
AOUT (dBFS)
5MHz/25MSPS
1MHz/5MSPS
2MHz/10MSPS
13MHz/65MSPS
25MHz/125MSPS
00
61
7-
0
13
Figure 13. Single-Tone SFDR vs. AOUT @ fOUT = fCLK/5
80
70
55
65
75
60
6.75MHz/7.25MHz @ 65MSPS
16.9MHz/18.1MHz @ 125MSPS
S
F
DR
(
d
B
c)
–20
–16
–12
–8
–4
0
AOUT (dBFS)
3.38MHz/3.36MHz @ 25MSPS
0.965MHz/1.035MHz @ 7MSPS
00
61
7-
0
14
Figure 14. Dual-Tone SFDR vs. AOUT @ fOUT = fCLK/7
55
60
65
70
S
INA
D
(
d
Bc)
fCLK (MSPS)
20
40
60
80
100
120
140
IOUTFS = 20mA
IOUTFS = 10mA
IOUTFS = 5mA
00
61
7-
0
15
Figure 15. SINAD vs. fCLK and IOUTFS @ fOUT = 5 MHz and 0 dBFS
CODE
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
0.25
IN
L
(
L
S
B
)
0
200
400
600
800
1000
0
06
17
-01
6
Figure 16. Typical INL
CODE
–0.10
–0.05
0
0.05
0.25
0.30
0.20
0.15
0.10
DNL
(
L
S
B)
0
200
400
600
800
1000
00
61
7-
01
7
Figure 17. Typical DNL
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