參數(shù)資料
型號(hào): AD9764-EB
廠商: Analog Devices, Inc.
英文描述: 14-Bit, 125 MSPS TxDAC D/A Converter
中文描述: 14位,125 MSPS的TxDAC系列D / A轉(zhuǎn)換
文件頁數(shù): 8/22頁
文件大?。?/td> 307K
代理商: AD9764-EB
REV. B
AD9764
–8–
d
–70
–75
–95
000.0E+0
40.0E+6
80.0E+6
120.0E+6
–80
–85
–90
2ND HARMONIC
3RD HARMONIC
4TH HARMONIC
Figure 12. THD vs. f
CLOCK
@
f
OUT
= 2 MHz
CODE
E
2.0
–2.0
0
16000
4000
8000
12000
1.5
0.0
–0.5
–1.0
–1.5
1.0
0.5
Figure 15. Typical INL
000.0E+0
7.5E+6
15.0E+6
22.5E+6
1
0
–10
–90
–50
–60
–70
–80
–20
–40
–30
f
CLK
= 50MSPS
f
= 1.25MHz
SFDR = 78dBc
AMPLITUDE = 0dBFS
Figure 18. Single-Tone SFDR
f
CLOCK
– MSPS
S
85
80
60
0
10
100
20
30
40 50
60
70 80 90
75
70
65
I
OUTFS
= 5mA,
DVDD = +5V
I
OUTFS
= 5mA,
DVDD = +3V
I
= 10mA,
DVDD = +5V
I
= 10mA,
DVDD = +3V
I
= 20mA,
DVDD = +5V
I
= 20mA,
DVDD = +3V
Figure 13. SNR vs. f
CLOCK
@ f
OUT
=
2.0 MHz
CODE
E
2.0
–1.0
0
16000
4000
8000
12000
1.5
1.0
0.5
0.0
–0.5
Figure 16. Typical DNL
0E+0
25E+6
5E+6
10E+6
15E+6
20E+6
1
0
–10
–90
–50
–60
–70
–80
–20
–40
–30
f
CLK
= 50MSPS
f
OUT1
= 6.75MHz
f
OUT2
= 7.25MHz
SFDR = 69dBc
AMPLITUDE = 0dBFS
Figure 19. Dual-Tone SFDR
OUTPUT FREQUENCY – MHz
S
80
70
50
1
10
100
60
I
DIFF
@ 0dBFS
I
DIFF
@ –6dBFS
I
A
@ 0dBFS
I
A
@ –6dBFS
Figure 14. Differential vs. Single-
Ended SFDR vs. f
OUT
@ 50 MSPS
TEMPERATURE –
8
C
S
80
75
50
–40
–20
80
60
70
65
60
55
40
20
0
2.5MHz
10MHz
40MHz
Figure 17. SFDR vs. Temperature
@ 100 MSPS, 0 dBFS
1
0
–70
–100
000.0E+0
–10
–60
–80
–90
–40
–50
–20
–30
7.5E+6
15.0E+6
22.5E+6
f
CLK
= 50MSPS
f
OUT1
= 6.25MHz
f
OUT2
= 6.75MHz
f
OUT3
= 7.25MHz
f
= 7.75MHz
SFDR = 66dBc
AMPLITUDE = 0dBFS
Figure 20. Four-Tone SFDR
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