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參數(shù)資料
| 型號： | AD9760ARUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT 125MSPS 28-TSSOP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 50 |
| 系列： | TxDAC® |
| 設置時間： | 35ns |
| 位數(shù)： | 10 |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 175mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 28-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 125M |
| 產品目錄頁面： | 785 (CN2011-ZH PDF) |
| 配用： | AD9760-EBZ-ND - BOARD EVAL FOR AD9760 |
AD9760
–18–
REV. B
APPLICATIONS
Using the AD9760 for QAM Modulation
QAM is one of the most widely used digital modulation schemes
in digital communication systems. This modulation technique
can be found in both FDM spreadspectrum (i.e., CDMA) based
systems. A QAM signal is a carrier frequency that is both
modulated in amplitude (i.e., AM modulation) and in phase
(i.e., PM modulation). It can be generated by independently
modulating two carriers of identical frequency but with a 90
°
phase difference. This results in an in-phase (I) carrier compo-
nent and a quadrature (Q) carrier component at a 90
° phase
shift with respect to the I component. The I and Q components
are then summed to provide a QAM signal at the specified car-
rier frequency.
A common and traditional implementation of a QAM modu-
lator is shown in Figure 56. The modulation is performed in the
analog domain in which two DACs are used to generate the
baseband I and Q components, respectively. Each component is
then typically applied to a Nyquist filter before being applied to
a quadrature mixer. The matching Nyquist filters shape and
limit each component’s spectral envelope while minimizing
intersymbol interference. The DAC is typically updated at the
QAM symbol rate or possibly a multiple of it if an interpolating
filter precedes the DAC. The use of an interpolating filter typi-
cally eases the implementation and complexity of the analog
filter, which can be a significant contributor to mismatches in
gain and phase between the two baseband channels. A quadra-
ture mixer modulates the I and Q components with in-phase
and quadrature phase carrier frequency and sums the two out-
puts to provide the QAM signal.
AD9760
0
90
Σ
AD9760
CARRIER
FREQUENCY
10
TO
MIXER
DSP
OR
ASIC
NYQUIST
FILTERS
QUADRATURE
MODULATOR
Figure 56. Typical Analog QAM Architecture
In this implementation, it is much more difficult to maintain
proper gain and phase matching between the I and Q channels.
The circuit implementation shown in Figure 57 helps improve
on the matching and temperature stability characteristics be-
tween the I and Q channels. Using a single voltage reference
derived from U1 to set the gain for both the I and Q channels
will improve the gain matching and stability. Further enhance-
ments in gain matching and stability are achieved by using sepa-
rate matching resistor networks for both RSET and RLOAD.
Additional trim capability via RCAL1 and RCAL2 can be added to
compensate for any initial mismatch in gain between the two
channels. This may be attributed to any mismatch between U1
and U2’s gain setting resistor (RSET), effective load resistance,
(RLOAD), and/or voltage offset of each DAC’s control amplifier.
The differential voltage outputs of U1 and U2 are fed into their
respective differential inputs of a quadrature mixer via matching
50
filter networks.
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
REFIO
FS ADJ
IOUTA
IOUTB
CLOCK
RSET
2k *
RCAL1
50
CLOCK
U1
I-CHANNEL
50 **
RLOAD
50 **
RLOAD
TO
NYQUIST
FILTER
AND MIXER
REFIO
FS ADJ
IOUTA
IOUTB
CLOCK
RSET
2k *
RCAL2
100
U2
Q-CHANNEL
50 **
RLOAD
50 **
RLOAD
TO
NYQUIST
FILTER
AND MIXER
0.1 F
REFLO
AVDD
* OHMTEK ORNA1001F
** OHMTEK TOMC1603-50F
Figure 57. Baseband QAM Implementation Using Two
AD9760s
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this
implementation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
QAM carrier frequency. Figure 58 shows a block diagram of
such an implementation using the AD9760.
50
AD9760
LPF
50
TO
MIXER
STEL-1130
QAM
12
COS
12
SIN
12
I DATA
Q DATA
12
CARRIER
FREQUENCY
10
STEL-1177
NCO
CLOCK
Figure 58. Digital QAM Architecture
AD9760 EVALUATION BOARD
General Description
The AD9760-EB is an evaluation board for the AD9760 10-bit
D/A converter. Careful attention to layout and circuit design,
combined with a prototyping area, allow the user to easily and
effectively evaluate the AD9760 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9760
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators with the on-
board option to add a resistor network for proper load termina-
tion. Provisions are also made to operate the AD9760 with
either the internal or external reference or to exercise the power-
down feature.
Refer to the application note AN-420, “Using the AD9760/
AD9760/AD9764-EB Evaluation Board,” for a thorough
description and operating instructions for the AD9760 evalua-
tion board.
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| AD9760ARUZ50 | 功能描述:IC DAC 10BIT 125MSPS 28TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:TxDAC® 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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| AD9760ARUZRL7 | 功能描述:IC DAC 10BIT 125MSPS 28TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:TxDAC® 標準包裝:47 系列:- 設置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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