(AVDD = +5 V, DVDD = +3 V, IOUTFS " />
參數(shù)資料
型號(hào): AD9754ARZ
廠商: Analog Devices Inc
文件頁數(shù): 22/24頁
文件大?。?/td> 0K
描述: IC DAC 14BIT 125MSPS 28-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 27
系列: TxDAC®
設(shè)置時(shí)間: 35ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 220mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極
采樣率(每秒): 125M
產(chǎn)品目錄頁面: 785 (CN2011-ZH PDF)
AD9754
–7–
REV. A
Typical AC Characterization Curves
(AVDD = +5 V, DVDD = +3 V, IOUTFS = 20 mA, 50
Doubly Terminated Load, Differential Output, TA = +25 C, SFDR up to Nyquist, unless
otherwise noted)
fOUT – MHz
SFDR
dB
90
80
40
0.1
100
110
60
70
5MSPS
25MSPS
65MSPS
50MSPS
125MSPS
50
Figure 3. SFDR vs. fOUT @ 0 dBFS
fOUT – MHz
SFDR
dBc
90
40
05
30
10
15
20
80
70
60
0dBFS
–6dBFS
–12dBFS
25
50
Figure 6. SFDR vs. fOUT @ 65 MSPS
AOUT – dBFS
SFDR
dB
90
40
85
75
80
70
65
55
60
50
45
–30
–25
0
–20
–15
–10
–5
455kHz
@5MSPS
2.27MHz
@25MSPS
59.1MHz
@65MSPS
11.37MHz
@125MSPS
Figure 9. Single-Tone SFDR vs. AOUT
@ fOUT = fCLOCK/11
FREQUENCY – MHz
SFDR
dB
85
40
0.0
2.0
0.4
0.8
1.2
1.6
80
75
70
60
55
65
0dBFS
–6dBFS
–12dBFS
50
45
90
Figure 4. SFDR vs. fOUT @ 5 MSPS
fOUT – MHz
SFDR
dBc
90
40
010
50
20
30
40
80
70
60
0dBFS
–6dBFS
–12dBFS
50
60
Figure 7. SFDR vs. fOUT @125 MSPS
AOUT – dBFS
SFDR
dB
100
40
90
70
80
50
60
–30
–25
0
–20
–15
–10
–5
1MHz
@5MSPS
5MHz
@25MSPS
25MHz
@125MSPS
13MHz
@65MSPS
Figure 10. Single-Tone SFDR vs.
AOUT @ fOUT = fCLOCK/5
FREQUENCY – MHz
SFDR
dB
90
95
02
46
8
10
80
75
70
60
55
65
0dBFS
–6dBFS
–12dBFS
50
45
85
Figure 5. SFDR vs. fOUT @ 25 MSPS
80
10mA FS
fOUT – MHz
SFDR
dBc
90
40
0
212
468
10
60
50
70
20mA FS
5mA FS
Figure 8. SFDR vs. fOUT and
IOUTFS @ 25 MSPS and 0 dBFS
fCLOCK – MSPS
SNR–
dB
85
60
0
40
140
60
80
100
120
80
70
75
65
20
20mA FS
5mA FS
10mA FS
Figure 11. SNR vs. fCLOCK and IOUTFS
@ fOUT = 2 MHz and 0 dBFS
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