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參數(shù)資料
型號(hào)： AD9751-EB
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9751
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC®
DAC 的數(shù)量： 1
位數(shù)： 10
采樣率（每秒）： 300M
數(shù)據(jù)接口： 并聯(lián)
設(shè)置時(shí)間： 11ns
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9751
相關(guān)產(chǎn)品： AD9751ASTZRL-ND - IC DAC 10BIT 300MSPS 48LQFP
AD9751ASTZ-ND - IC DAC 10BIT 300MSPS 48-LQFP
REV. C
AD9751
–20–
DAC
LA
TCHES
DAC
INPUT
LATCHES
INPUT
LATCHES
PLL/DIVIDER
CLK+ CLK– PLLLOCK
DVDD AVDD
IOUTA
IOUTB
PORT 1
DATA
INPUT
PORT 2
DATA
INPUT
RSET2
1.9k
FSADJ
0.1 F
REFIO ACOM1 ACOM
DCOM
AD9751
50
0.1 F
68
INPM
INPP
LOIM
LOIP
OUTP
OUTM
AD8343 ACTIVE MIXER
0.1 F
LOINPUT
M/A-COM ETC-1-1-13 WIDEBAND BALUN
Figure 30. QAM Transmitter Architecture Using AD9751 and AD8343 Active Mixer
–20
CENTER 860MHz
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
11MHz/
SPAN 110MHz
REF
LV1
(dBm)
MARKER 1 [T2]
RBW
10kHz
RF ATT
0dB
–100.59dBm
VBW
10kHz
859.91983968MHz
SWT
2.8 s
UNIT
dBm
COMMENT A: 25 MSYMBOL, 64 QAM CARRIER @ 825MHz
1
2
C0
Cu1
C0
C11
1
2MA
–100.59bBm,
+859.91983968MHz
–64.88dBm
–62.26dBm
–7.38dBm
33.48dB
–49.91983968MHz
33.10dB
–49.91983968MHz
1 [T2]
CH PWR
ACP UP
ACP LOW
1 [T2]
2 [T2]
Figure 31. Signal of Figure 27 Mixed to Carrier
Frequency of 800 MHz
Effects of Noise and Distortion on Bit Error Rate (BER)
Textbook analysis of Bit Error Rate (BER) performance is
generally stated in terms of E (energy in watts-per-symbol or
watts-per-bit) and NO (spectral noise density in watts/Hz). For
QAM signals, this performance is shown graphically in Figure 32.
M represents the number of levels in each quadrature PAM signal
(i.e., M = 8 for 64 QAM, M = 16 for 256 QAM). Figure 32
implies gray coding in the QAM constellation, as well as the use
of matched filters at the receiver, which is typical. The
horizontal axis of Figure 32 can be converted to units of energy/
symbol by adding to the horizontal axis 10 log of the number of
bits in the desired curve. For instance, to achieve a BER of 1e-6
with 64 QAM, an energy per bit of 20 dB is necessary. To
calculate energy per symbol, add 10 log(6) or 7.8 dB. Therefore
64 QAM with a BER of 1e-6 (assuming no source or channel
coding) can theoretically be achieved with an energy/symbol-
to-noise (E/NO) ratio of 27.8 dB. Due to the loss and interferers
inherent in the wireless path, this signal-to-noise ratio must be
realized at the receiver to achieve the given bit error rate.
Distortion effects on BER are much more difficult to determine
accurately. Most often in simulation, the energies of the strongest
distortion components are root-sum-squared with the noise, and
the result is treated as if it were all noise. That being said, using
the example above of 64 QAM with the BER of 1e-6, if the E/NO
ratio is much greater than the worst-case SFDR, the noise will
dominate the BER calculation.
The AD9751 has a worst-case in-band SFDR of 47 dB at the
upper end of its frequency spectrum (see TPCs 2 and 3). When
used to synthesize high level QAM signals as described above,
noise, as opposed to distortion, will dominate its performance
in these applications.
SNR/BIT (dB)
1E0
1E–3
1E–6
20
5
0
SYMBOL
ERROR
PROBABILITY
1E–2
1E–5
1E–1
1E–4
10
15
16 QAM
64 QAM
4 QAM
Figure 32. Probability of a Symbol Error for QAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9752 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 125 MSPS High Performance TxDAC D/A Converter
AD9752AR 功能描述:IC DAC 12BIT 125MSPS 28-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k
AD9752ARRL 制造商:Analog Devices 功能描述:DAC 1-CH Segment 12-bit 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:12-BIT 125 MSPS+ TXDAC D/A CONVERTER - Tape and Reel
AD9752ARU 功能描述:IC DAC 12BIT 125MSPS HP 28-TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k
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