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參數(shù)資料
| 型號： | AD9751-EB |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 10-Bit, 300 MSPS High-Speed TxDAC+ D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, DAC WITH PROGRAMMABLE PLL, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 714K |
| 代理商： | AD9751-EB |
REV. 0
–4–
AD9751–SPECIFICATIONS
DIGITAL SPECIFICATIONS
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9751 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
(T
MIN
to T
MAX
, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, CLKVDD = 3.3 V, I
OUTFS
= 20 mA, unless
otherwise noted.)
Parameter
Min
Typ
Max
Unit
DIGITAL INPUTS
Logic “1”
Logic “0”
Logic “1” Current
Logic “0” Current
Input Capacitance
Input Setup Time (t
S
)
Input Hold Time (t
H
)
Input Setup Time (t
S,
PLLVDD = 0 V)
Input Hold Time (t
H,
PLLVDD = 0 V))
Min CLK Freq
1
2.1
3
0
V
V
μ
A
μ
A
pF
ns
ns
ns
ns
MHz
0.9
+10
+10
–10
–10
5
0.5
0.5
–1.5
1.7
6.25
1.0
1.0
–1.0
2.5
ABSOLUTE MAXIMUM RATINGS
*
Parameter
With Respect to
Min
Max
Unit
AVDD, DVDD, CLKVDD, PLLVDD
AVDD, DVDD, CLKVDD, PLLVDD
ACOM, DCOM, CLKCOM, PLLCOM
REFIO, REFLO, FSADJ
I
OUTA
, I
OUTB
Digital Data Inputs (DB9 to DB0)
CLK+/CLK–, PLLLOCK
DIV0, DIV1, RESET
LPF
Junction Temperature
Storage Temperature
Lead Temperature (10 sec)
ACOM, DCOM, CLKCOM, PLLCOM
ACOM, DCOM, CLKCOM, PLLCOM
ACOM, DCOM, CLKCOM, PLLCOM
ACOM
ACOM
DCOM
CLKCOM
CLKCOM
PLLCOM
–0.3
–3.9
–0.3
–0.3
–1.0
–0.3
–0.3
–0.3
–0.3
+3.9
+3.9
+3.9
AVDD + 0.3
AVDD + 0.3
DVDD + 0.3
CLKVDD + 0.3
CLKVDD + 0.3
PLLVDD + 0.3
150
+150
300
V
V
V
V
V
V
V
V
V
°
C
°
C
°
C
–65
*
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for
extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
AD9751AST –40
°
C to +85
°
C 48-Lead LQFP ST-48
AD9751-EB
Evaluation Board
NOTE
Min CLK freq only applies when using internal PLL. When PLL is disabled, there
is no minimum CLK frequency.
THERMAL CHARACTERISTIC
Thermal Resistance
48-Lead LQFP
θ
JA
= 91
°
C/W
PORT 1
DATA X
DATA Y
t
H
t
S
t
LPW
t
PD
DATA X
DATA Y
t
PD
PORT 2
I
OUTA
OR I
OUTB
INPUT CLK
(PLL ENABLED)
1 CLOCK @ PLLLOCK
(PLL DISABLED)
DATA IN
Figure 1. I/O Timing
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