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參數(shù)資料
| 型號： | AD974ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 0K |
| 描述： | IC DAS 16BIT 4CH 200KSPS 28-SOIC |
| 標準包裝： | 1 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 776 (CN2011-ZH PDF) |
| 配用： | EVAL-AD974CB-ND - BOARD EVAL FOR AD974 |
REV. A
AD974
–15–
OFFSET AND GAIN ADJUSTMENT
The AD974 is factory trimmed to minimize gain, offset and
linearity errors. There are no internal provisions to allow for any
further adjustment of offset error through external circuitry.
The reference of the AD974 can be adjusted as shown in Figure
12. This will allow the full-scale error of any one channel to be
adjusted to zero or will allow the average full-scale error of the
four channels to be minimized.
2.2 F
576k
50k
+
CAP
REF
AGND2
AD974
+5V
Figure 12. AD974 Full-Scale Trim
VOLTAGE REFERENCE
The AD974 has an on-chip temperature compensated bandgap
voltage reference that is factory trimmed to +2.5 V
± 20 mV.
The accuracy of the AD974 over the specified temperature
range is dominated by the drift performance of the voltage refer-
ence. The on-chip voltage reference is laser-trimmed to provide
a typical drift of 7 ppm/
°C. This typical drift characteristic is
shown in Figure 13, which is a plot of the change in reference
voltage (in mV) versus the change in temperature—notice the
plot is normalized for zero error at +25
°C. If improved drift perfor-
mance is required, an external reference such as the AD780
should be used to provide a drift as low as 3 ppm/
°C. In order to
simplify the drive requirements of the voltage reference (internal
or external), an on-chip reference buffer is provided.
–55
25
125
1mV
/DIV
DEGREES – Celsius
Figure 13. Reference Drift
The output of this buffer is provided at the CAP pin and is
available to the user; however, when externally loading the refer-
ence buffer, it is important to make sure that proper precautions
are taken to minimize any degradation in the ADC’s perfor-
mance. Figure 14 shows the load regulation of the reference
buffer. Notice that this figure is also normalized so that there is
zero error with no dc load. In the linear region, the output imped-
ance at this point is typically 1
. Because of this output imped-
ance, it is important to minimize any ac- or input-dependent
loads that will lead to increased distortion. Any dc load will
simply act as a gain error. Although the typical characteristic of
Figure 14 shows that the AD974 is capable of driving loads
greater than 15 mA, it is recommended that the steady state
current not exceed 2 mA.
LOAD CURRENT – 5mA/DIV
SOURCE CAPABILITY
SINK CAPABILITY
dV
ON
CAP
PIN
–
10nV/
DIV
Figure 14. CAP Pin Load Regulation
Using an External Reference
In addition to the on-chip reference, an external 2.5 V reference
can be applied. When choosing an external reference for a
16-bit application, however, careful attention should be paid to
noise and temperature drift. These critical specifications can
have a significant effect on the ADC performance.
Figure 15 shows the AD974 used in bipolar mode with the
AD780 voltage reference applied to the REF pin. The AD780
is a bandgap reference that exhibits ultralow drift, low initial
error and low output noise. For low power applications, the
AD780 provides a low quiescent current, high accuracy and low
temperature drift solution.
BIP
VxA
VxB
AGND1
CAP
REF
AGND2
AD974
VIN
C4
0.1 F
C2
2.2 F
+
VANA
TEMP
VOUT
GND
VIN
AD780
6
4
2
3
C1
2.2 F
+
–
C3
1 F
+
–
+5V
0.1 F
–
Figure 15. External Reference to AD974 Configured for
±10 V Input Range
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