參數(shù)資料
型號(hào): AD9637BCPZRL7-80
廠商: Analog Devices Inc
文件頁數(shù): 25/40頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SRL 80MSPS 64LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 12
采樣率(每秒): 80M
數(shù)據(jù)接口: LVDS,串行,SPI?
轉(zhuǎn)換器數(shù)目: 8
功率耗散(最大): 574mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: *
輸入數(shù)目和類型: 8 個(gè)差分
Data Sheet
AD9637
Rev. A | Page 31 of 40
MEMORY MAP REGISTER TABLE
The AD9637 uses a 3-wire interface and 16-bit addressing and,
therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and Bit 3
and Bit 4 are set to 1. When Register 0x00, Bit 5 is set high, the
SPI enters a soft reset, where all of the user registers revert to
their default values and Bit 2 is automatically cleared.
Table 17. Memory Map Register Table
Reg.
Addr.
(Hex)
Parameter
Name
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
Comments
Chip Configuration Registers
0x00
SPI port
configuration
0 = SDO
active
LSB first
Soft reset
1 =
16-bit
address
1 =
16-bit
address
Soft reset
LSB first
0 = SDO
active
0x18
The nibbles
are mirrored
so that LSB or
MSB first
mode registers
correctly. The
default for
the ADCs is
16-bit mode.
0x01
Chip ID (global)
8-bit chip ID, Bits[7:0]
AD9637 0x93 = octal 12-bit 40 MSPS/80 MSPS serial LVDS
Read
only
0x93
Unique chip ID
that is used to
differentiate
devices; read
only.
0x02
Chip grade
(global)
Open
Speed grade ID, Bits[6:4]
001 = 40 MSPS
100 = 80 MSPS
Open
Read
only
Unique speed
grade ID that
is used to
differentiate
graded
devices; read
only.
Device Index and Transfer Registers
0x04
Device Index 2
Open
Data
ChannelH
Data
Channel G
Data
Channel F
Data
Channel E
0xF
Bits are set to
determine
which device
on chip
receives the
next write
command.
The default is
all devices on
chip.
0x05
Device Index 1
Open
Clock
Channel
DCO
Clock
Channel
FCO
Data
ChannelD
Data
Channel C
Data
Channel B
Data
Channel A
0x3F
Bits are set
to determine
which device
on chip
receives the
next write
command.
The default is
all devices on
chip.
0xFF
Transfer
Open
Initiate
override
0x00
Set
resolution/
sample rate
override.
Global ADC Functions
0x08
Power modes
(global)
Open
External
power-
down
pin
function
0 = full
power-
down
1 =
standby
Open
Internal power-down
mode
00 = chip run
01 = full power-down
10 = standby
11 = reset
0x00
Determines
various
generic
modes of chip
operation.
0x09
Clock (global)
Open
Duty cycle
stabilizer
0 = off
1 = on
0x01
Turns duty
cycle
stabilizer on
or off.
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