AVDD = 3.3 V, DRVDD = 3.3 V, TMIN
參數(shù)資料
型號(hào): AD9411BSVZ-200
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 10BIT 200MSPS 100TQFP
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝: 1
位數(shù): 10
采樣率(每秒): 200M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.59W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤(pán)
輸入數(shù)目和類(lèi)型: 1 個(gè)差分,單極
Data Sheet
AD9411
Rev. B | Page 5 of 28
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, TMIN = –40°C, TMAX = +85°C, unless otherwise noted.
Table 3.
AD9411-170
AD9411-200
Parameter
Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
CLOCK INPUTS
(CLK+, CLK–)1
Differential Input Voltage2
Full
IV
0.2
V
Common-Mode Voltage3
Full
VI
1.375
1.5
1.575
1.375
1.5
1.575
V
Input Resistance
Full
VI
3.2
5.5
6.5
3.2
5.5
6.5
Input Capacitance
25°C
V
4
pF
LOGIC INPUTS (S1, S2, S4, S5)
Logic 1 Voltage
Full
IV
2.0
V
Logic 0 Voltage
Full
IV
0.8
V
Logic 1 Input Current
Full
VI
190
μA
Logic 0 Input Current
Full
VI
10
μA
Input Resistance
25°C
V
30
Input Capacitance
25°C
V
4
pF
LVDS LOGIC OUTPUTS4
VOD Differential Output Voltage
Full
VI
247
454
247
454
mV
VOS Output Offset Voltage
Full
VI
1.125
1.375
1.125
1.375
V
Output Coding
Twos Complement or Binary
2 All ac specifications tested by driving CLK+ and CLK– differentially, |(CLK+) – (CLK–)| > 200 mV.
3 Clock inputs’ common mode can be externally set, such that 0.9 V < CLK
< 2.6 V.
4 LVDS RTERM = 100 Ω, LVDS output current set resistor (RSET) = 3.74 kΩ
(1% tolerance).
OBSOLETE
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