參數(shù)資料
型號(hào): AD9284BCPZRL7-250
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/24頁(yè)
文件大?。?/td> 0K
描述: IC ADC 8BIT 250MSPS 1.8V 48LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 8
采樣率(每秒): 250M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 330mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,雙極
配用: AD9284-250EBZ-ND - BOARD EVAL FOR AD9284
Data Sheet
AD9284
Rev. A | Page 19 of 24
MEMORY MAP REGISTER TABLE
All address and bit locations that are not included in Table 12 are not currently supported for this device.
Table 12. Memory Map Registers
Addr
(Hex)
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Default
Notes/
Comments
Chip Configuration Registers
0x00
SPI port
configuration
0
LSB first
Soft reset
1
Soft reset
LSB first
0
0x18
Nibbles are
mirrored so
that LSB-first
or MSB-first
mode
registers
correctly,
regardless of
shift mode
0x01
Chip ID
(global)
8-bit chip ID
0x0A
Unique chip
ID used to
differentiate
devices; read
only
0x02
Chip grade
(global)
Open
Speed grade ID
000 = 250 MSPS
Open
0x00
Unique speed
grade ID is
used to
differentiate
devices; read
only
Device Index and Transfer Registers
0x05
Device
Index A
Open
ADC B
default
ADC A
default
0xFF
Bits are set to
determine
which on-chip
device
receives the
next write
command;
default is all
devices on the
chip
0xFF
Transfer
Open
Transfer
0xFF
Synchronous
transfer of
data from the
master shift
register to
the slave
Program Registers (May or may not be indexed by device index)
0x08
Modes
(global)
Open
Internal power-down mode
00: chip run
01: full power-down
10: reserved
11: reserved
0x00
Determines
various
generic
modes
of chip
operation
0x09
Clock
(global)
Open
Clock
boost
Duty cycle
stabilizer
0x01
0x0D
Test mode
(local)
Open
Reset
PN23 gen
Reset
PN9 gen
Open
Output test mode
000: off
001: midscale short
010: +FS short
011: FS short
100: checkerboard output
101: PN23 sequence
110: PN9 sequence
111: one-/zero-word toggle
0x00
When test
mode is set,
test data is
placed on the
output pins
in place of
normal data
0x0E
BIST (local)
Open
BIST init
Open
BIST enable
0x00
BIST mode
config
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