參數(shù)資料
型號(hào)： AD9258BCPZ-125
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/44頁(yè)
文件大小： 0K
描述： IC ADC 14BIT 125MSPS DL 64LFCSP
設(shè)計(jì)資源： High Performance, Dual Channel IF Sampling Receiver (CN0140)
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 14
采樣率（每秒）： 125M
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 788mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 托盤
輸入數(shù)目和類型： 2 個(gè)差分，單極
AD9258
Rev. A | Page 29 of 44
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9258.
The input range can be adjusted by varying the reference voltage
applied to the AD9258, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the sections that follow. The Reference
Decoupling section describes the best practices for PCB layout
of the reference.
Internal Reference Connection
A comparator within the AD9258 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 11. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 70), setting VREF to 1.0 V for a 2.0 V p-p full-
scale input. In this mode, with SENSE grounded, the full scale can
also be adjusted through the SPI port by adjusting Bit 6 and Bit 7
of Register 0x18. These bits can be used to change the full scale
to 1.25 V p-p, 1.5 V p-p, 1.75 V p-p, or to the default of 2.0 V p-p,
as shown in Table 17.
Connecting the SENSE pin to the VREF pin switches the reference
amplifier output to the SENSE pin, completing the loop and pro-
viding a 0.5 V reference output for a 1 V p-p full-scale input.
VREF
SENSE
0.5V
AD9258
SELECT
LOGIC
0.1F
1.0F
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
08
12
4-
0
40
Figure 70. Internal Reference Configuration
If a resistor divider is connected externally to the chip, as shown
in Figure 71, the switch again sets to the SENSE pin. This puts
the reference amplifier in a noninverting mode with the VREF
output, defined as follows:
+
×
=
R1
R2
VREF
1
5
.
0
The input range of the ADC always equals twice the voltage at
the reference (VREF) pin for either an internal or an external
reference.
0.5V
AD9258
SELECT
LOGIC
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
VREF
SENSE
0.1F
1.0F
R2
R1
08
12
4-
0
41
Figure 71. Programmable Reference Configuration
If the internal reference of the AD9258 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 72 shows
how the internal reference voltage is affected by loading.
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
LOAD CURRENT (mA)
RE
F
E
RE
NCE
V
O
L
T
A
G
E
RRO
R
(
%
)
08
12
4-
0
54
VREF = 1V
VREF = 0.5V
Figure 72. Reference Voltage Accuracy vs. Load Current
Table 11. Reference Configuration Summary
Selected Mode
SENSE Voltage
Resulting VREF (V)
Resulting Differential Span (V p-p)
External Reference
AVDD
N/A
2 × external reference
Internal Fixed Reference
VREF
0.5
1.0
Programmable Reference
0.2 V to VREF
+
×
R1
R2
1
0.5
(see Figure 71)
2 × VREF
Internal Fixed Reference
AGND to 0.2 V
1.0
2.0
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