參數(shù)資料
型號(hào)： AD9238BCPZRL-65
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/48頁(yè)
文件大小： 0K
描述： IC ADC 12BIT DUAL 65MSPS 64LFCSP
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 12
采樣率（每秒）： 65M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 600mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，單極；2 個(gè)差分，單極
配用： AD9238BCP-65EBZ-ND - BOARD EVAL WITH AD9238BCP-65
AD9238
Rev. C | Page 20 of 48
External Reference Operation
The use of an external reference may be necessary to
enhance the gain accuracy of the ADC or to improve thermal
drift characteristics. When multiple ADCs track one another, a
single reference (internal or external) may be necessary to
reduce gain matching errors to an acceptable level. A high
precision external reference may also be selected to provide
lower gain and offset temperature drift. Figure 37 shows the
typical drift characteristics of the internal reference in both
1 V and 0.5 V modes. When the SENSE pin is tied to AVDD,
the internal reference is disabled, allowing the use of an
external reference. An internal reference buffer loads the
external reference with an equivalent 7 kΩ load. The internal
buffer still generates the positive and negative full-scale
references, REFT and REFB, for the ADC core. The input span
is always twice the value of the reference voltage; therefore, the
external reference must be limited to a maximum of 1 V. If the
internal reference of the AD9238 is used to drive multiple
converters to improve gain matching, the loading of the
reference by the other converters must be considered. Figure 38
depicts how the internal reference voltage is affected by loading.
VIN+
VIN–
VREF
10
μF
10
μF
10
μF
0.1
μF
0.1
μF
REFT
ADC
CORE
SELECT
LOGIC
SENSE
0.5V
AD9238
REFB
0.1
μF
R1
R2
02640-035
Figure 36. Programmable Reference Configuration
TEMPERATURE (
°C)
0.2
VREF
ERRO
R
(
%
)
1.2
1.0
0.8
0.6
0.4
0
–40 –30 –20 –10
0
10
20
30
40
50
60
70
80
VREF = 1V
VREF = 0.5V
02640-067
Figure 37. Typical VREF Drift
LOAD (mA)
–0.20
ERRO
R
(
%
)
0.05
0
–0.05
–0.10
–0.15
–0.25
0
0.5
1.0
1.5
2.0
2.5
3.0
0.5V ERROR
1V ERROR
02640-068
Figure 38. VREF Accuracy vs. Load
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