參數(shù)資料
型號： AD9235BCP-40
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 12-Bit, 20/40/65 MSPS 3 V A/D Converter
中文描述： 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32
封裝： MO-220-VHHD-2, LFCSP-32
文件頁數(shù)： 3/32頁
文件大?。?/td> 1181K
代理商： AD9235BCP-40
REV. B
–3–
AD9235
DIGITAL SPECIFICATIONS
Test
Level
AD9235BRU-20
Min
Typ
AD9235BRU-40
Min
Typ
AD9235BRU/BCP-65
Min
Typ
Parameter
Temp
Max
Max
Max
Unit
LOGIC INPUTS
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Full
Full
Full
Full
Full
IV
IV
IV
IV
V
2.0
2.0
2.0
V
V
μ
A
μ
A
pF
0.8
+10
+10
0.8
+10
+10
0.8
+10
+10
–10
–10
–10
–10
–10
–10
2
2
2
LOGIC OUTPUTS
*
DRVDD = 3.3 V
High-Level Output Voltage
(IOH = 50
μ
A)
High-Level Output Voltage
(IOH = 0.5 mA)
Low-Level Output Voltage
(IOL = 1.6 mA)
Low-Level Output Voltage
(IOL = 50
μ
A)
DRVDD = 2.5 V
High-Level Output Voltage
(IOH = 50
μ
A)
High-Level Output Voltage
(IOH = 0.5 mA)
Low-Level Output Voltage
(IOL = 1.6 mA)
Low-Level Output Voltage
(IOL = 50
μ
A)
Full
IV
3.29
3.29
3.29
V
Full
IV
3.25
3.25
3.25
V
Full
IV
0.2
0.2
0.2
V
Full
IV
0.05
0.05
0.05
V
Full
IV
2.49
2.49
2.49
V
Full
IV
2.45
2.45
2.45
V
Full
IV
0.2
0.2
0.2
V
Full
IV
0.05
0.05
0.05
V
*
Output voltage levels measured with 5 pF load on each output.
Specifications subject to change without notice.
SWITCHING SPECIFICATIONS
Test
Level
AD9235BRU-20
Min
Typ
AD9235BRU-40
Min
Typ
AD9235BRU/BCP-65
Min
Typ
Parameter
CLOCK INPUT PARAMETERS
Maximum Conversion Rate
Minimum Conversion Rate
CLK Period
CLK Pulsewidth High
1
CLK Pulsewidth Low
1
DATA OUTPUT PARAMETERS
Output Delay
2
(t
)
Pipeline Delay (Latency)
Aperture Delay (t
A
)
Aperture Uncertainty Jitter (t
J
)
Wake-Up Time
3
OUT-OF-RANGE RECOVERY
TIME
Temp
Max
Max
Max
Unit
Full
Full
Full
Full
Full
VI
V
V
V
V
20
40
65
MSPS
MSPS
ns
ns
ns
1
1
1
50.0
15.0
15.0
25.0
8.8
8.8
15.4
6.2
6.2
Full
Full
Full
Full
Full
V
V
V
V
V
3.5
7
1.0
0.5
3.0
3.5
7
1.0
0.5
3.0
3.5
7
1.0
0.5
3.0
ns
Cycles
ns
ps rms
ms
Full
V
1
1
2
Cycles
NOTES
1
For the AD9235-65 model only, with duty cycle stabilizer enabled. DCS function not applicable for -20 and -40 models.
2
Output delay is measured from CLK 50% transition to DATA 50% transition, with 5 pF load on each output.
3
Wake-up time is dependent on value of decoupling capacitors; typical values shown with 0.1
μ
F and 10
μ
F capacitors on REFT and REFB.
Specifications subject to change without notice.
Figure 1. Timing Diagram
tA
t
PD
= 6.0ns MAX
N–9
N–8
N–7
N–6
N–5
N–4
N–3
N–2
N–1
N
ANALOG
INPUT
CLK
DATA
OUT
N–1
N
N+1
N+2
N+3
N+4
N+5
N+6
N+7
N+8
相關(guān)PDF資料
PDF描述
AD9235BCP-65 12-Bit, 20/40/65 MSPS 3 V A/D Converter
AD9235BRU-20 12-Bit, 20/40/65 MSPS 3 V A/D Converter
AD9235BRU-40 12-Bit, 20/40/65 MSPS 3 V A/D Converter
AD9235BRU-65 12-Bit, 20/40/65 MSPS 3 V A/D Converter
AD9236BCP-80EB 12-Bit, 80 MSPS, 3V A/D Converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9235BCP-40EB 制造商:Analog Devices 功能描述:EVAL BD FOR 12-BIT, 20/40/65 MSPS ,3V A/D CNVRTR - Bulk
AD9235BCP-40EBZ 制造商:Analog Devices 功能描述:Evaluation Board For 12-Bit, 20/40/65 MSPS ,3 V A/D Converter 制造商:Analog Devices 功能描述:EVAL BD FOR 12-BIT, 20/40/65 MSPS ,3V A/D CNVRTR - Bulk
AD9235BCP-65 制造商:Analog Devices 功能描述:ADC Single Pipelined 65Msps 12-bit Parallel 32-Pin LFCSP EP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 65MSPS 12-BIT PARALLEL 32LFCSP EP - Bulk 制造商:Rochester Electronics LLC 功能描述:12-BIT 3V 20/40/65 MSPS ADC - Bulk
AD9235BCP-65EB 制造商:Analog Devices 功能描述:Evaluation Board For 12-Bit, 20/40/65 MSPS ,3 V A/D Converter 制造商:Analog Devices 功能描述:EVAL BD FOR 12-BIT, 20/40/65 MSPS ,3V A/D CNVRTR - Bulk
AD9235BCP-65EBZ 制造商:Analog Devices 功能描述:Evaluation Board For 12-Bit, 20/40/65 MSPS ,3 V A/D Converter 制造商:Analog Devices 功能描述:EVAL BD FOR 12-BIT, 20/40/65 MSPS ,3V A/D CNVRTR - Bulk
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