AD9218
Rev. C | Page 6 of 28
SWITCHING SPECIFICATIONS
VDD = 3.0 V, V = 3.0 V; external reference, unless otherwise noted.
D
Table 4.
Test
AD9218BST-40/-65
AD9218BST-80/-105
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Unit
ENCODE INPUT PARAMETERS
Maximum Encode Rate
Full
VI
40/65
80/105
MSPS
Minimum Encode Rate
Full
IV
20/20
MSPS
Encode Pulse Width High (tEH)
Full
IV
7/6
5/3.8
ns
Encode Pulse Width Low (tEL)
Full
IV
7/6
5/3.8
ns
Aperture Delay (tA)
25°C
V
2
ns
Aperture Uncertainty (Jitter)
25°C
V
3
ps rms
DIGITAL OUTPUT PARAMETERS
Full
VI
2.5
ns
Output Propagation Delay (t
PD)1Full
VI
4.5
7
4.5
6
ns
Output Rise Time (tR)
25°C
V
1
1.0
ns
Output Fall Time (tF)
25°C
V
1.2
ns
Out-of-Range Recovery Time
25°C
V
5
ns
Transient Response Time
25°C
V
5
ns
Recovery Time from Power-Down
25°C
V
10
Cycles
Pipeline Delay
Full
IV
5
Cycles
1 t and t
V
PD
are measured from the 1.5 level of the ENCODE input to the 50%/50% levels of the digital outputs swing. The digital output load during test is not to exceed
an ac load of 5 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
TIMING DIAGRAMS
02
00
1-
0
02
1/fS
tA
tEH
tEL
tPD
tV
SAMPLE N
ENCODE A
ENCODE B
D9A TO D0A
D9B TO D0B
AINA
AINB
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
DATA N – 1
DATA N
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
DATA N – 1
DATA N
SAMPLE
N + 1
SAMPLE
N + 5
SAMPLE
N + 6
SAMPLE
N + 2
SAMPLE
N + 3
SAMPLE
N + 4
Figure 2. Normal Operation, Same Clock (S1 = 1, S2 = 0) Channel Timing