AD9148
Data Sheet
Rev. B | Page 10 of 72
Table 8. Thermal Resistance and Maximum Power
PCB
Maximum
Power (W)
Package Type
TA (°C)
PCB Layers
PCB Vias
External Heat Sink1
Case
TJ (°C)
θJA (°C/W)
196-ball CSP_BGA
85
12
25
No
CSP_BGA
125
18.0
2.22
196-ball CSP_BGA
85
12
25
Yes
CSP_BGA
125
16.0
2.50
196-ball BGA_ED
85
12
25
No
BGA_ED
125
15.0
2.67
196-ball BGA_ED
85
12
25
Yes
BGA_ED
125
14.0
2.86
1
Heat sink is used in the thermal model: 13 mm × 13 mm, 15 mm tall.
Table 9. Power vs. fDAC Rate and Functionality
Coarse Modulation
Fine Modulation (NCO)
Maximum Power (W)
Package
PLL Off
PLL On
PLL Off
PLL On
2.22
CSP_BGA
No
820
740
695
630
2.50
CSP_BGA
Yes
950
875
810
740
2.67
BGA_EP
No
1000
945
870
810
2.86
BGA_EP
Yes
1000
940
870
1
Typical maximum fDAC rate with inverse sinc filter off.
2
Heat sink is used in the thermal model: 13 mm × 13 mm, 15 mm tall.