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參數(shù)資料
| 型號： | AD9042STPCB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, 41 MSPS Monolithic A/D Converter |
| 中文描述： | 12位，41 MSPS的單片機(jī)的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 488K |
| 代理商： | AD9042STPCB |
AC SPECIFICATIONS
1
T est
Level
AD9042AST
Min
T yp
T est
Level
AD9042AD
T yp
Parameter (Conditions)
T emp
Max
Min
Max
Units
SNR
3
Analog Input
@ –1 dBFS
1.2 MHz
+25
°
C
Full
+25
°
C
Full
+25
°
C
Full
V
V
V
V
I
V
68
67.5
67.5
67
67
66.5
I
V
I
V
I
V
65
68
67.5
67.5
67
67
66.5
dB
dB
dB
dB
dB
dB
9.6 MHz
64.5
19.5 MHz
64
64
SINAD
4
Analog Input
@ –1 dBFS
1.2 MHz
+25
°
C
Full
+25
°
C
Full
+25
°
C
Full
V
V
V
V
I
V
67.5
67
67.5
67
67
66.5
I
V
I
V
I
V
64
67.5
67
67.5
67
67
66.5
dB
dB
dB
dB
dB
dB
9.6 MHz
64
19.5 MHz
64
64
Worst Spur
5
Analog Input
@ –1 dBFS
1.2 MHz
+25
°
C
Full
+25
°
C
Full
+25
°
C
Full
V
V
V
V
I
V
80
78
80
78
80
78
I
V
I
V
I
V
74
80
78
80
78
80
78
dBc
dBc
dBc
dBc
dBc
dBc
9.6 MHz
74
19.5 MHz
73
73
Small Signal SFDR (w/Dither)
6
Analog Input @1.2 MHz
Full
Full
Full
V
V
V
90
90
90
V
V
V
90
90
90
dBFS
dBFS
dBFS
9.6 MHz
19.5 MHz
T wo-T one IMD Rejection
7
F1, F2 @ –7 dBFS
Full
V
80
V
80
dBc
T wo-T one SFDR (w/Dither)
8
Full
V
90
V
90
dBFS
T hermal Noise
+25
°
C
V
0.33
V
0.33
LSB rms
Differential Nonlinearity
(ENCODE = 20 MSPS)
+25
°
C
Full
I
V
–1.0
±
0.3
±
0.4
+1.0
I
VI
–1.0
–1.0
±
0.3
+1.0
+1.25
LSB
LSB
Integral Nonlinearity
(ENCODE = 20 MSPS)
Full
V
±
0.75
V
±
0.75
LSB
Analog Input Bandwidth
+25
°
C
V
100
V
100
MHz
T ransient Response
+25
°
C
V
10
V
10
ns
Overvoltage Recovery T ime
+25
°
C
V
25
V
25
ns
NOT ES
1
All ac specifications tested by driving ENCODE and
ENCODE
differentially; see “ENCODING the AD9042” for details.
2
C1 (Pin 10 on AD9042AST only) tied to GND through 0.01
μ
F capacitor.
3
Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).
4
Analog input signal power at –1 dBFS; signal-to-noise and distortion (SINAD ) is the ratio of signal level to total noise + harmonics.
5
Analog input signal power at –1 dBFS; worst spur is the ratio of the signal level to worst spur, usually limited by harmonics.
6
Analog input signal power swept from –20 dBFS to –95 dBFS; dither power = –32.5 dBm; dither circuit used on input signal (see “Overcoming Static Nonlinearities
with Dither”); SFDR is ratio of converter full scale to worst spur.
7
T ones at –7 dBFS (F1 = 15.3 MHz, F2 = 19.5 MHz); two tone intermodulation distortion (IMD) rejection is ratio of either tone to worst third order intermod product.
8
Both input tones swept from –20 to –95 dBFS; Dither power = –32.5 dBm; dither circuit used on input signal (see “Overcoming Static Nonlinearities with Dither);
two tone spurious-free dynamic range (SFDR) is the ratio of converter full scale to worst spur.
Specifications subject to change without notice.
REV. A
–3–
AD9042
(AV
CC
= DV
CC
= +5 V; ENCODE &
ENCODE
= 41 MSPS;
V
REF
tied to V
OFFSET
through 50
; T
MN
= –40
8
C, T
MAX
= +85
8
C)
2
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| AD9042AD | 12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042AST | 12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042CHIPS | 12-Bit, 41 MSPS Monolithic A/D Converter |
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| AD9048JP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 8-Bit |
| AD9048JQ | 制造商:Analog Devices 功能描述:ADC Single Flash 38Msps 8-bit Parallel 28-Pin CDIP |
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