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參數(shù)資料
| 型號(hào)： | AD9032 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit 25 MSPS A/D Converter(25MSPS 12位A/D轉(zhuǎn)換器) |
| 中文描述： | 12位25 MSPS的A / D轉(zhuǎn)換（25Msps時(shí)12位的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 249K |
| 代理商： | AD9032 |
AD9032
REV. 0
–5–
PIN DESCRIPTIONS
Pin
Name
Description
1
GAIN
ADJUST
Can be used to null out initial gain
error of ADC. Normally open.
2
OFFSET
ADJUST
Can be used to null out initial off-
set error of ADC. Normally open.
3, 5, 6,
14, 21,
22, 35, 40
GROUND
All ground pins should be connect
ed together and to low-impedance
ground plane near AD9034.
4
ANALOG
INPUT
Analog input to ADC,
±
1.024 V
input range; 100
input resist-
ance; 7 pF input capacitance.
7, 8, 9, 15, DNC
16, 36, 37
Do not connect. Internal test
points.
10
OVERFLOW ECL-compatible output; normally
low. High when analog input
> +FS.
11
DATA
READY
ECL-compatible output. Rising
edge of signal suitable, for exter-
nally latching D
0
– D
11
.
12, 17,
20, 38
–V
S
–5.2 V supply voltage.
13, 39
+V
S
+5.0 V supply voltage.
18
ENCODE
Differential ECL convert command.
19
ENCODE
Sampling occurs on rising edge;
no internal terminations.
23–34
D
0
–D
11
ECL-compatible digital outputs;
2s complement coding.
THEORY OF OPERATION
The AD9032 is a digitally corrected subranging analog-to-digital
converter (ADC) optimized for fast sampling rates and dynamic
range. Refer to the block diagram on the first page. The
AD9032 is a vertically integrated structure consisting of a track-
and-hold (T/H) amplifier, a combined flash ADC and digital-to-
analog (DAC), a summation amplifier, digital error correction
logic, and timing circuits. Reference circuits to generate stable
DC voltages and currents that maintain the static accuracy of
the device are also included, but are not shown on the block
diagram.
Internally, the monolithic T/H (AD9101) provides fast settling
and acquisition times while minimizing distortion introduced by
the sampling process. The unique design of the sampling bridge
allows accurate sampling of high slew rate signals with negligible
distortion. The effects of jitter and other aperture errors have
been reduced to provide dynamic performance previously un-
available in monolithic and discrete designs.
At the output of the T/H amplifier, the analog input is converted
by the first (5-bit) ADC. This 12-bit representation of the input
value is stored in the digital error correction logic. It is also con-
verted back to an analog signal by the 14-bit-accurate DAC on
the same chip with the ADC. The 32 DAC current sources are
steered directly by the outputs of the 32 input comparators on
the 5-bit ADC. This minimizes propagation delay through the
DAC, and allows the summation of the DAC signal and the held
output of the T/H to settle quickly. The hold time of the T/H is
optimized to allow sufficient settling time without sacrificing the
acquisition time necessary to acquire the next sample.
The residue signal, representing the difference between the 5-bit
conversion (DAC output) and the input signal held by the T/H,
is amplified by the summation amplifier. During the tracking pe-
riod of the T/H, this residue signal can be much larger than the
input range of the 8-bit ADC and would saturate the output
stage of a normal amplifier. To protect the ADC and maintain
fast settling times under all conditions, the summation amplifier
is a custom design with clamping circuits that prevent satura-
tion, limit the output voltage, and preserve settling time.
The 8-bit flash ADC determines the 7 least significant bits
(LSBs) of the 12-bit conversion and generates a correction bit
for any small errors created by inaccuracies in the first 5-bit con-
version. This 8-bit signal and the 5-bit quantization are com-
bined to obtain a 12-bit-accurate representation of the analog
input voltage.
PIN DESIGNATIONS
GROUND
+V
S
–V
S
DNC
DNC
GROUND
D
0
(LSB)
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
(MSB)
GROUND
GROUND
DNC
DNC
GROUND
ANALOG INPUT
GROUND
GROUND
DNC
DNC
OVERFLOW
DATA READY
–V
S
+V
S
GROUND
DNC
DNC
–V
S
DNC
ENCODE
–V
S
DIGITAL
ENCODE
1
40
5
10
15
20
21
26
31
36
16
17
18
19
22
23
24
25
27
28
29
30
32
33
34
35
37
38
39
2
3
4
6
7
8
9
11
12
13
14
TOP VIEW
(Not to Scale)
AD9032
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9032AD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9032AZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9032BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9032BZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9032TD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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