參數(shù)資料
型號: AD9022SZ
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 12-Bit 20 MSPS Monolithic A/D Converter
中文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDSO28
封裝: CERAMIC, LCC-28
文件頁數(shù): 7/12頁
文件大?。?/td> 240K
代理商: AD9022SZ
AD9022
REV. B
–7–
is present when the unit is strobed with an ENCODE com-
mand. T he conversion process begins on the rising edge of this
pulse, which should conform to the minimum and maximum
pulsewidth requirements shown in the specifications. Operation
below the recommended encode rate (4 MSPS) may result in
excessive droop in the internal T /H devices–leading to large dc
and ac errors.
T he held analog value of the first track-and-hold is applied to a
5-bit flash converter and a second T /H. T he 5-bit flash con-
verter resolves the most significant bits (MSBs) of the held
analog voltage. T hese five bits are reconstructed via a 5-bit
DAC and subtracted from the original T /H output signal to
form a residue signal.
A second T /H holds the amplified residue signal while it is en-
coded with a second 5-bit flash ADC. Again the five bits are
reconstructed and subtracted from the second T /H output to
form a residue signal. T his residue is amplified and encoded
with a 4-bit flash ADC to provide the three least significant bits
(LSBs) of the digital output and one bit of error correction.
Digital Error Correction logic aligns the data from the three
flash converters and presents the result as a 12-bit parallel digi-
tal word. T he output stage of the AD9022 is T T L. Output data
may be strobed on the rising edge of the ENCODE command.
AD9022 IN RE CE IVE R APPLICAT IONS
Advances in semiconductor processes have resulted in low cost
digital signal processing (DSP) and analog signal processing
which can help create cost effective alternative receiver designs.
T oday, an all-digital receiver allows tuning, demodulation, and
detection of receiver signals in the digital domain. By digitizing
IF signals directly, and utilizing digital techniques, it becomes
possible to make significant improvements in receiver design.
For high frequency IFs, the ADC is the key to the receiver’s
performance. Unfortunately, the specifications frequently used
by receiver designers and analog-to-digital (ADC) manufactur-
ers are often very different. Noise Figure and Intercept Point are
common measures of noise and linearity in analog RF system
design. ADCs are more frequently specified in terms of SNR
and harmonic distortion.
Noise
Noise figure (NF) is a measure of receiver sensitivity and is
defined as the degradation of signal-to-noise ratio (SNR) as a
signal passes through a device. In equation form:
NF
=
SNR
(
in
) –
SNR
(
out
)
Noise figure is a bandwidth invariant parameter for reasonably
narrow bandwidths in most devices. T he system noise figure for
a combination of amplifiers and mixers, for instance, can be
analyzed without regard to the information bandwidth.
T hermal noise contribution from the ADC behaves in a similar
fashion; however, the spectral density of quantization noise is a
function of the sample rate. In addition, the spectral density of
the quantization noise is flat only in an ADC with perfect linear-
ity, i.e., perfect 1 LSB step sizes.
T o analyze the system noise performance, ADC noise figure is
calculated by normalizing the SNR of the ADC output to a 1 Hz
bandwidth. T his result is given by:
SNR
(/
Hz
) =
SNR
+ 10
log
10
(
F
S
/2)
where
F
S
is the sample rate.
T HE ORY OF OPE RAT ION
Refer to the block diagram.
T he AD9022 employs a three-pass subranging architecture and
digital error correction. T his combination of design techniques
ensures 12-bit accuracy at relatively low power.
Analog input signals are immediately attenuated through a
resistor divider and applied directly to the sampling bridge of
the track-and-hold (T /H). T he T /H holds whatever analog value
0
–100
–70
–90
–80
–40
–60
–50
–30
–20
–10
F
FREQUENCY – MHz
10
0
A
IN
= 1.2MHz
A
= –1.0dBFS
SNR = 66.7dB
THD = 77.51dB
SFDR = 79.49dBFS
Figure 8. FFT Plot
0
–100
–70
–90
–80
–40
–60
–50
–30
–20
–10
F
FREQUENCY – MHz
10
A
IN
= 9.6MHz
A
= –1.0dBFS
SNR = 66.05dB
THD = 74.28dB
SFDR = 75.32dBFS
0
Figure 9. FFT Plot
10.0
0.0
8.0
6.0
4.0
2.0
A
IN1
= 8.9MHz
A
IN2
= 9.8MHz
A
IN1
= 7.0dBFS
A
= 7.0dBFS
SFDR = 80.62dBFS
0
100
80
40
60
20
F
FREQUENCY – MHz
120
Figure 10. Two-Tone FFT
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PDF描述
AD9022 12-Bit 20 MSPS Monolithic A/D Converter
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