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ELECTRICAL CHARACTERISTICS
(–V
S
= –5.2 V; Differential Reference Voltage = 2.0 V; unless otherwise noted)
AD9002AD/AJ
Min
Typ
AD9002BD/BJ
Min
Typ
AD9002SD/SE
Min
Typ
AD9002TD/TE
Min
Typ
Parameter
Temp
Max
Max
Max
Max
Units
RESOLUTION
8
8
8
8
Bits
DC ACCURACY
Differential Linearity
+25
°
C
Full
+25
°
C
Full
Full
0.6
0.75
1.0
1.0
1.2
0.4
0.5
0.75
0.5
1.2
0.6
0.75
1.0
1.0
1.2
0.4
0.5
0.75
0.5
1.2
LSB
LSB
LSB
LSB
Integral Linearity
0.6
0.4
0.6
0.4
No Missing Codes
GUARANTEED
GUARANTEED
GUARANTEED
GUARANTEED
INITIAL OFFSET ERROR
Top of Reference Ladder
+25
°
C
Full
+25
°
C
Full
Full
8
14
17
10
12
8
14
17
10
12
8
14
17
10
12
8
14
17
10
12
mV
mV
mV
mV
μ
V/
°
C
Bottom of Reference Ladder
4
4
4
4
Offset Drift Coefficient
20
20
20
20
ANALOG INPUT
Input Bias Current
1
+25
°
C
Full
+25
°
C
+25
°
C
+25
°
C
+25
°
C
60
200
200
60
200
200
60
200
200
60
200
200
μ
A
μ
A
k
pF
MHz
V/
μ
s
Input Resistance
Input Capacitance
Large Signal Bandwidth
2
Input Slew Rate
3
25
200
17
160
440
25
200
17
160
440
25
200
17
160
440
25
200
17
160
440
22
22
22
22
REFERENCE INPUT
Reference Ladder Resistance
Ladder Temperature Coefficient
Reference Input Bandwidth
+25
°
C
40
80
0.25
10
110
40
80
0.25
10
110
40
80
0.25
10
110
40
80
0.25
10
110
/
°
C
MHz
+25
°
C
DYNAMIC PERFORMANCE
Conversion Rate
Aperture Delay
Aperture Uncertainty (Jitter)
Output Delay (t
)
4, 5
Transient Response
6
Overvoltage Recovery Time
7
Output Rise Time
4
Output Fall Time
4
Output Time Skew
4, 8
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
125
150
1.3
15
3.7
6
6
125
150
1.3
15
3.7
6
6
125
150
1.3
15
3.7
6
6
125
150
1.3
15
3.7
6
6
MSPS
ns
ps
ns
ns
ns
ns
ns
ns
2.5
5.5
2.5
5.5
2.5
5.5
2.5
5.5
3.0
2.5
3.0
2.5
3.0
2.5
3.0
2.5
0.6
0.6
0.6
0.6
ENCODE INPUT
Logic “1” Voltage
4
Logic “0” Voltage
4
Logic “1” Current
Logic “0” Current
Input Capacitance
Encode Pulsewidth (Low)
9
Encode Pulsewidth (High)
9
Full
Full
Full
Full
+25
°
C
+25
°
C
+25
°
C
–1.1
–1.1
–1.1
–1.1
V
V
μ
A
μ
A
pF
ns
ns
–1.5
150
120
–1.5
150
120
–1.5
150
120
–1.5
150
120
3
3
3
3
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
OVERFLOW INHIBIT INPUT
0 V Input Current
AC LINEARITY
10
Effective Bits
11
In-Band Harmonics
dc to 1.23 MHz
dc to 9.3 MHz
dc to 19.3 MHz
Signal-to-Noise Ratio
12
Two Tone Intermod Rejection
13
DIGITAL OUTPUTS
4
Logic “1” Voltage
Logic “0” Voltage
POWER SUPPLY
14
Supply Current (–5.2 V)
Full
144
300
144
300
144
300
144
300
μ
A
+25
°
C
7.6
7.6
7.6
7.6
Bits
+25
°
C
+25
°
C
+25
°
C
+25
°
C
+25
°
C
48
55
50
44
47.6
60
48
55
50
44
47.6
60
48
55
50
44
47.6
60
48
55
50
44
47.6
60
dB
dB
dB
dB
dB
46
46
46
46
Full
Full
–1.1
–1.1
–1.1
–1.1
V
V
–1.5
–1.5
–1.5
–1.5
+25
°
C
Full
+25
°
C
+25
°
C
+25
°
C
145
175
200
145
175
200
145
175
200
145
175
200
mA
mA
mW
mW
mV/V
Nominal Power Dissipation
Reference Ladder Dissipation
Power Supply Rejection Ratio
15
750
50
0.8
750
50
0.8
750
50
0.8
750
50
0.8
1.5
1.5
1.5
1.5
REV. D
–2–
AD9002–SPECIFICATIONS
NOTES
1
Measured with AIN = 0 V.
2
Measured by FFT analysis where fundamental is –3 dBc.
3
Input slew rate derived from rise time (10 to 90%) of full scale input.
4
0utputs terminated through 100
to –2 V.
5
Measured from ENCODE in to data out for LSB only.
6
For full-scale step input, 8-bit accuracy is attained in specified time.
7
Recovers to 8-bit accuracy in specified time after 150% full-scale input overvoltage.
8
Output time skew includes high-to-low and low-to-high transitions as well as
bit-to-bit time skew differences.
9
ENCODE signal rise/fall times should be less than 10 ns for normal operation.
10
Measured at 125 MSPS encode rate.
11
Analog input frequency = 1.23 MHz.
12
RMS signal to rms noise, with 1.23 MHz analog input signal.
13
Input signals 1 V p-p @ 1.23 MHz and 1 V p-p @ 2.30 MHz.
14
Supplies should remain stable within
±
5% for normal operation.
15
Measured at –5.2 V
±
5%.
Specifications subject to change without notice.