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AD9002
–4–
REV. D
FUNCTIONAL DESCRIPTION
Pin #
Name
Description
1
2
DIGITAL GROUND
OVERFLOW INH
One of four digital ground pins. All digital ground pins should be connected together.
OVERFLOW INHIBIT controls the data output polarity for overvoltage inputs.
t
u
p
n
I
g
o
n
A
d
V
e
b
2
–
a
n
r
E
o
w
g
8
o
e
i
a
o
F
D
f
o
v
O
(
)
n
D
–
1
w
8
o
e
D
1
v
O
o
)
D
N
G
(
d
e
b
i
h
n
I
f
D
–
V
N
I
V
+
>
F
E
R
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
V
N
I
≤
V
+
F
E
R
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
0
3
HYSTERESIS
The Hysteresis control voltage varies the comparator hysteresis from 0 mV to 10 mV, for a change
from –5.2 V to –2.2 V at the Hysteresis control pin. Normally converted to –5.2 V.
The most positive reference voltage for the internal resistor ladder.
One of two analog input pins. Both analog input pins should be connected together.
One of two analog ground pins. Both analog ground pins should be connected together.
Noninverted input of the differential encode input. This pin is driven in conjunction with
ENCODE
. Data is latched on the rising edge of the ENCODE signal.
Inverted input of the differential encode input. This pin is driven in conjunction with ENCODE.
One of two analog ground pins. Both analog ground pins should be connected together.
One of two analog input pins. Both analog inputs should be connected together.
The most negative reference voltage for the internal resistor ladder.
The midpoint tap on the internal resistor ladder.
One of four digital ground pins. All digital ground pins should be connected together.
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be con-
nected together.
Digital data output.
Digital data output.
One of four digital ground pins. All digital ground pins should be connected together.
One of two negative analog supply pins (nominally –5.2 V). Both analog supply pins should be con-
nected together.
One of four digital ground pins. All digital ground pins should be connected together.
Digital data output.
Digital data output.
Overflow data output. Logic high indicates an input overvoltage (V
IN
> +V
REF
) if OVERFLOW
INHIBIT is enabled (overflow enabled, –5.2 V). See OVERFLOW INHIBIT.
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be
connected together.
4
5
6
7
+V
REF
ANALOG INPUT
ANALOG GROUND
ENCODE
8
9
10
11
12
13
14
ENCODE
ANALOG GROUND
ANALOG INPUT
–V
REF
REF
MID
DIGITAL GROUND
DIGITAL –V
S
15
16–19
20
21, 22
D1 (LSB)
D2–D5
DIGITAL GROUND
ANALOG –V
S
23
24, 25
26
27
DIGITAL GROUND
D6, D7
D8 (MSB)
OVERFLOW
28
DIGITAL –V
S
DIP
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9002
DIGITAL
GROUND
DIGITAL –V
S
REF
MID
–V
REF
ANALOG INPUT
ANALOG
GROUND
ENCODE
DIGITAL
GROUND
OVERFLOW INH
HYSTERESIS
+V
REF
ENCODE
ANALOG
GROUND
ANALOG INPUT
D1(LSB)
D2
D3
D4
D5
DIGITAL
GROUND
ANALOG –V
S
DIGITAL –V
S
OVERFLOW
D8(MSB)
D7
ANALOG –V
S
DIGITAL
GROUND
D6
LCC
28
27
1
2
3
4
26
25
21
22
23
24
19
20
5
6
7
8
9
10
11
12 13
R
M
14
D
S
15 16
D
17 18
D
TOP VIEW
(Not to Scale)
D7
D6
DIGITAL
ANALOG –V
S
ANALOG –V
S
DIGITAL
D5
ANALOG INPUT
ANALOG
ENCODE
ENCODE
ANALOG
ANALOG INPUT
–V
REF
+
R
H
O
D
D
S
O
D
D
D
D
AD9002
JLCC
(Not to Scale)
TOP VIEW
25
24
23
22 21 20 19
5 6 7 8 9 10 11
A
18
17
16
15
14
13
12
26
27
28
1
2
3
4
D3
D2
D1(LSB)
DIGITAL –V
S
DIGITAL
REF
MID
D8(MSB)
OVERFLOW
DIGITAL –V
S
DIGITAL
OVERFLOW INH
HYSTERESIS
+V
REF
D
D
D
A
S
D
D
A
E
E
A
A
–
R
D4
A
S
AD9002
PIN DESIGNATIONS