VDD VREFH GND
參數資料
型號: AD8804ARUZ-REEL
廠商: Analog Devices Inc
文件頁數: 16/16頁
文件大?。?/td> 0K
描述: IC DAC 8BIT 12CH W/SD 20TSSOP
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 2,500
系列: TrimDAC®
設置時間: 600ns
位數: 8
數據接口: 串行
轉換器數目: 12
電壓電源: 單電源
功率耗散(最大): 60µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 帶卷 (TR)
輸出數目和類型: 12 電壓,單極
采樣率(每秒): 1.7M
AD8802/AD8804
REV. 0
–9–
A
VDD
VREFH
GND
VREFL
AD8802/
AD8804
B
+5V
+12V
–5V
OP191
OP193
RF
100k
RS
100k
–5V TO +4.98V
0V TO +10V
100k
100k
+5V
AD8804
ONLY
Figure 23. Increasing Output Voltage Swing
DAC B of Figure 24 is in a noninverting gain of two configura-
tions, which increases the available output swing to +10 V. The
feedback resistors can be adjusted to provide any scaling of the
output voltage, within the limits of the external op amp power
supplies.
Microcomputer Interfaces
The AD8802/AD8804 serial data input provides an easy inter-
face to a variety of single-chip microcomputers (
Cs). Many Cs
have a built-in serial data capability that can be used for com-
municating with the DAC. In cases where no serial port is pro-
vided, or it is being used for some other purpose (such as an
RS-232 communications interface), the AD8802/AD8804 can
easily be addressed in software.
Twelve data bits are required to load a value into the AD8802/
AD8804 (4 bits for the DAC address and 8 bits for the DAC
value). If more than 12 bits are transmitted before the Chip Se-
lect input goes high, the extra (i.e., the most-significant) bits are
ignored. This feature is valuable because most
Cs only transmit
data in 8-bit increments. Thus, the
C will send 16 bits to the
DAC instead of 12 bits. The AD8802/AD8804 will only re-
spond to the last 12 bits clocked into the SDI port, however, so
the serial data interface is not affected.
An 8051
C Interface
A typical interface between the AD8802/AD8804 and an 8051
C is shown in Figure 24. This interface uses the 8051’s internal
serial port. The serial port is programmed for Mode 0 opera-
tion, which functions as a simple 8-bit shift register. The 8051’s
Port 3.0 pin functions as the serial data output, while Port 3.1
serves as the serial clock.
When data is written to the Serial Buffer Register (SBUF, at
Special Function Register location 99H), the data is automati-
cally converted to serial format and clocked out via Port 3.0 and
Port 3.1. After 8 bits have been transmitted, the Transmit Inter-
rupt flag (SCON.1) is set and the next 8 bits can be transmitted.
The AD8802 and AD8804 require the Chip Select to go low at
the beginning of the serial data transfer. In addition, the SCLK
input must be high when the Chip Select input goes high at the
end of the transfer. The 8051’s serial clock meets this require-
ment, since Port 3.1 both begins and ends the serial data in the
high state.
+5V
P3.0
P3.1
P1.3
P1.2
P1.1
SERIAL DATA
SHIFT REGISTER
RxD
TxD
SHIFT CLOCK
1.1
1.2
1.3
PORT 1
SBUF
8051 C
0.1F
10F
O1
O12
GND
AD8802
SDI
SCLK
RESET
SHDN
CS
VREFH
VDD
Figure 24. Interfacing the 8051
C to an AD8802/AD8804,
Using the Serial Port
Software for the 8051 Interface
A software for the AD8802/AD8804 to 8051 interface is
shown in Listing 1. The routine transters the 8-bit data stored at
data memory location DAC_VALUE to the AD8802/AD8804
DAC addressed by the contents of location DAC_ADDR.
The subroutine begins by setting appropriate bits in the Serial
Control register to configure the serial port for Mode 0 opera-
tion. Next the DAC’s Chip Select input is set low to enable the
AD8802/AD8804. The DAC address is obtained from memory
location DAC_ADDR, adjusted to compensate for the 8051’s
serial data format, and moved to the serial buffer register. At
this point, serial data transmission begins automatically. When
all 8 bits have been sent, the Transmit Interrupt bit is set, and
the subroutine then proceeds to send the DAC value stored at
location DAC_VALUE. Finally the Chip Select input is re-
turned high, causing the appropriate AD8802/AD8804 output
voltage to change, and the subroutine ends.
The 8051 sends data out of its shift register LSB first, while the
AD8802/AD8804 require data MSB first. The subroutine there-
fore includes a BYTESWAP subroutine to reformat the data.
This routine transfers the MSB-first byte at location SHIFT1 to
an LSB-first byte at location SHIFT2. The routine rotates the
MSB of the first byte into the carry with a Rotate Left Carry in-
struction, then rotates the carry into the MSB of the second byte
with a Rotate Right Carry instruction. After 8 loops, SHIFT2
contains the data in the proper format.
The BYTESWAP routine in Listing 1 is convenient because the
DAC data can be calculated in normal LSB form. For example,
producing a ramp voltage on a DAC is simply a matter of re-
peatedly incrementing the DAC_VALUE location and calling
the LD_8802 subroutine.
If the
C’s hardware serial port is being used for other purposes,
the AD8802/AD8804 DAC can be loaded by using the parallel
port. A typical parallel interface is shown in Figure 25. The se-
rial data is transmitted to the DAC via the 8051’s Port 1.6 out-
put, while Port 1.6 acts as the serial clock.
Software for the interface of Figure 25 is contained in Listing 2. The
subroutine will send the value stored at location DAC_VALUE to
the AD8802/AD8804 DAC addressed by location DAC_ADDR.
The program begins by setting the AD8802/AD8804’s Serial
Clock and Chip Select inputs high, then setting Chip Select low
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