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參數(shù)資料
型號(hào): AD8803ARZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 16/16頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT OCTAL W/SD 16-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 48
系列: TrimDAC®
設(shè)置時(shí)間: 600ns
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 27.5mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
輸出數(shù)目和類型: 8 電壓,單極
采樣率(每秒): 1.7M
產(chǎn)品目錄頁(yè)面: 785 (CN2011-ZH PDF)
AD8801/AD8803
REV. A
–9–
VH
VL
VH
VL
VH
VL
VREFH VDD
+5V
GND
VREFL
DIGITAL INTERFACING
OMITTED FOR CLARITY
R1
100k
OP291
AD8801/
AD8803
SIMPLE BUFFER
0V TO 5V
SUMMER CIRCUIT
WITH FINE TRIM
ADJUSTMENT
Figure 23. Buffering the AD8801/AD8803 Output
Increasing Output Voltage Swing
An external amplifier can also be used to extend the output volt-
age swing beyond the power supply rails of the AD8801/AD8803.
This technique permits an easy digital interface for the DAC,
while expanding the output swing to take advantage of higher
voltage external power supplies. For example, DAC A of Fig-
ure 24 is configured to swing from –5 V to +5 V. The actual
output voltage is given by:
VOUT = 1 +
R
F
RS
×
D
256
× 5V
()–5V
Where D is the DAC input value (i.e., 0 to 255). This circuit
can be combined with the “fine/coarse” circuit of Figure 23 if,
for example, a very accurate adjustment around 0 V is desired.
A
VDD
VREFH
GND
VREFL
AD8801/
AD8803
B
+5V
+12V
–5V
OP191
OP193
RF
100k
RS
100k
–5V TO +4.98V
0V TO +10V
100k
100k
+5V
Figure 24. Increasing Output Voltage Swing
DAC B of Figure 24 is in a noninverting gain of two configura-
tion, which increases the available output swing to +10 V. The
feedback resistors can be adjusted to provide any scaling of the
output voltage, within the limits of the external op amp power
supplies.
Microcomputer Interfaces
The AD8801/AD8803 serial data input provides an easy inter-
face to a variety of single-chip microcomputers (
Cs). Many Cs
have a built-in serial data capability that can be used for com-
municating with the DAC. In cases where no serial port is pro-
vided, or it is being used for some other purpose (such as an
RS-232 communications interface), the AD8801/AD8803 can
easily be addressed in software.
Eleven data bits are required to load a value into the AD8801/
AD8803 (3 bits for the DAC address and 8 bits for the DAC
value). If more than 11 bits are transmitted before the Chip Se-
lect input goes high, the extra (i.e., the most-significant) bits are
ignored. This feature is valuable because most
Cs only transmit
data in 8-bit increments. Thus, the
C will send 16 bits to the
DAC instead of 11 bits. The AD8801/AD8803 will only re-
spond to the last 11 bits clocked into the SDI input, however, so
the serial data interface is not affected.
An 8051
C Interface
A typical interface between the AD8801/AD8803 and an 8051
C is shown in Figure 25. This interface uses the 8051’s internal
serial port. The serial port is programmed for Mode 0 opera-
tion, which functions as a simple 8-bit shift register. The 8051’s
Port3.0 pin functions as the serial data output, while Port3.1
serves as the serial clock.
O1
O2
O3
O4
O5
O6
O7
O8
SDI
SCLK
RESET
SHDN
CS
VDD VREFH
GND
AD8801
+5V
P3.0
P3.1
P1.3
P1.2
P1.1
SERIAL DATA SHIFT REGISTER
RxD
TxD
SHIFT CLOCK
1.1
1.2
1.3
PORT 1
SBUF
8051 C
0.1F
10F
+
Figure 25. Interfacing the 8051
C to an AD8801/AD8803,
Using the Serial Port
When data is written to the Serial Buffer Register (SBUF, at
Special Function Register location 99H), the data is automati-
cally converted to serial format and clocked out via Port3.0 and
Port3.1. After 8 bits have been transmitted, the Transmit Inter-
rupt flag (SCON.1) is set and the next 8 bits can be transmitted.
The AD8801 and AD8803 require the Chip Select to go low at
the beginning of the serial data transfer. In addition, the SCLK
input must be high when the Chip Select input goes high at the
end of the transfer. The 8051’s serial clock meets this require-
ment, since Port3.1 both begins and ends the serial data in the
high state.
Software for the 8051 Interface
A software routine for the AD8801/AD8803 to 8051 interface is
shown in Listing 1. The routine transfers the 8-bit data stored at
data memory location DAC_VALUE to the AD8801/AD8803
DAC addressed by the contents of location DAC_ADDR.
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