參數(shù)資料
型號(hào): AD8646WARZ-RL
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP GP R-R 24MHZ DUAL 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類(lèi)型: 通用
電路數(shù): 2
輸出類(lèi)型: 滿(mǎn)擺幅
轉(zhuǎn)換速率: 11 V/µs
增益帶寬積: 24MHz
電流 - 輸入偏壓: 50pA
電壓 - 輸入偏移: 600µV
電流 - 電源: 1.5mA
電流 - 輸出 / 通道: 120mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
Data Sheet
AD8646/AD8647/AD8648
Rev. E | Page 15 of 20
THEORY OF OPERATION
POWER-DOWN OPERATION
The shutdown function of the AD8647 is referenced to the
negative supply voltage of the operational amplifier. A logic
level high (> 2.0 V) enables the device, while a logic level low
(< 0.8 V) disables the device and places the output in a high
impedance condition. Several outputs can be wire-OR’ed, thus
eliminating a multiplexer. The logic input is a high impedance
CMOS input. If dual or split supplies are used, the logic signals
must be properly referred to the negative supply voltage.
MULTIPLEXING OPERATION
Because each op amp has a separate logic input enable pin, the
outputs can be connected together if it can be guaranteed that
only one op amp is active at any time. By connecting the op amps
as shown in Figure 48, a multiplexer can be eliminated. With
the reasonably short turn-on and turn-off times, low frequency
signal paths can be smoothly selected. The turn-off time is
slightly faster than the turn-on time so, even when using
sections from two different packages, the overlap is less than
300 nanoseconds.
06
52
7-
0
49
1/2
AD8647
1/2
AD8647
9
1
10
5V
6
7
8
2
3
4
5
2
13kHz
5kHz
2kHz
Figure 48. AD8647 Output Switching
06
52
7-
0
50
TIME (200s/DIV)
0V
5V
0V
2V
1V
Figure 49. Switching Waveforms
80
70
60
50
40
30
20
10
0
–10
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VIN_SDA AND VIN_SDB (V)
S
UP
P
L
Y
CURRE
NT
(
A)
06
52
7-
05
1
VSY = 5V
VSY = 2.7V
Figure 50. Supply Current Shutdown Mode, AD8647
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