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參數(shù)資料
| 型號(hào)： | AD8598AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Dual 7 ns Single Supply Comparator |
| 中文描述： | DUAL COMPARATOR, 8000 uV OFFSET-MAX, 7 ns RESPONSE TIME, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 137K |
| 代理商： | AD8598AN |
AD8598
–8–
REV. A
The input bias current for the AD8598 is 3
μ
A. As with any
PNP differential input stage, this bias current will go to zero on
an input that is high and will double on an input that is low.
Care should be taken in choosing resistor values to be con-
nected to the inputs as large resistors could cause significant
voltage drops due to the input bias current.
The input capacitance for the AD8598 is typically 3 pF. This is
measured by inserting a 5 k
source resistance to the input and
measuring the change in propagation delay.
Using Hysteresis
Hysteresis can easily be added to a comparator through the
addition of positive feedback. Adding hysteresis to a comparator
offers an advantage in noisy environments where it is not desir-
able for the output to toggle between states when the input
signal is near the switching threshold. Figure 17 shows a
method for configuring the AD8598 with hysteresis.
V
REF
R1
SIGNAL
COMPARATOR
R2
C
F
Figure 17. Configuring the AD8598 with Hysteresis
The input signal is directly connected to the noninverting input
of the comparator. The output is fed back to the inverting input
through R1 and R2. The ratio of R1 to R1 + R2 establishes the
width of the hysteresis window with V
REF
setting the center of
the window, or the average switching voltage. The Q output will
switch high when the input voltage is greater than V
HI
and will
not switch low again until the input voltage is less than V
LO
as
given in Equation 1:
V
HI
=
V
+
–1–
V
REF
(
)
R
1
R
1
+
R
2
+
V
REF
V
LO
=
V
REF
1–
R
1
R
1
+
R
2
(1)
where
V
+
is the positive supply voltage.
The capacitor, C
F,
can also be added to introduce a pole into the
feedback network. This has the effect of increasing the amount of
hysteresis at high frequencies. This can be useful when comparing
a relatively slow signal in a high frequency noise environment. At
frequencies greater than
f
P
=
1
2
π
C
F
R
2
, the hysteresis window
approaches V
HI
= V
+
– 1 V and V
LO
= 0 V. At frequencies less
than
f
P
the threshold voltages remain as in Equation 1.
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