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參數(shù)資料
| 型號： | AD8563 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| 中文描述： | 1.8 V至5 V自穩(wěn)零，在與關(guān)斷放大器 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 191K |
| 代理商： | AD8563 |
Preliminary Technical Data
AD8563
APPLICATIONS
GAIN SELECTION (GAIN-SETTING RESISTORS)
The gain of the AD8563 is set according to
G
= 2 × (
R2
/
R1
)
Rev. PrA | Page 7 of 15
(1)
Table 5 lists the recommended resistor values. Resistor R1 must
be at least 3.92 kΩ for proper operation. The use of resistors
larger than the recommended values results in higher offset and
higher noise.
Gain accuracy depends on the matching of R1 and R2. Any
mismatch in resistor values results in a gain error. Resistor
value errors due to drift will affect gain by the amount indicated
by Equation 1. However, due to the current-mode operation of
the AD8563, a mismatch in R1 and R2 does not degrade the
CMR.
Take care when selecting and positioning the gain setting
resistors. The resistors should be made of the same material and
package style. Surface-mount resistors are recommended. They
should be positioned as close together
as possible to minimize TC errors.
To maintain good CMR vs. frequency, the parasitic capacitance
on the R1 gain setting pins should be minimized and matched.
This also helps maintain a low gain error at G < 10.
If resistor trimming is required to set a precise gain, trim
Resistor R2 only. Using a potentiometer for R1 degrades the
amplifier’s performance.
REFERENCE CONNECTION
Unlike traditional three op amp instrumentation amplifiers,
parasitic resistance in series with V
REF
(Pin 7) does not degrade
CMR performance. This allows the AD8563 to attain its extremely
high CMR performance without the use of an external buffer
amplifier to drive the V
REF
pin, which is required by industry-
standard instrumentation amplifiers. This helps save valuable
printed circuit board space and minimizes system costs.
For optimal performance in single-supply applications, V
REF
should be set with a low noise precision voltage reference.
However, for a lower system cost, the reference voltage can be
set with a simple resistor voltage divider between the supply and
ground (see Figure 3). This configuration results in degraded
output offset performance if the resistors deviate from their
ideal values. In dual-supply applications, V
REF
can be connected
to ground.
The V
REF
pin current is approximately 20 pA, and as a result, an
external buffer is not required.
DISABLE FUNCTION
The AD8563 provides a shutdown function to conserve power
when the device is not needed. Although there is a 1 μA pull-up
current on the ENABLE pin, Pin 6 should be connected to the
positive supply for normal operation and to the negative supply
to turn the device off. It is not recommended to leave Pin 6
floating.
Turn-on time upon switching Pin 6 high is dominated by the
output filters. When the device is disabled, the output becomes
high impedance, enabling a multiplexing application of multiple
AD8563 instrumentation amplifiers.
OUTPUT FILTERING
Filter Capacitor C2 is required to limit the amount of switching
noise present at the output. The recommended bandwidth of
the filter created by C2 and R2 is 1.4 kHz. The user should first
select R1 and R2 based on the desired gain, then select C2 based on
C2
= 1/(1400 × 2 × π ×
R2
)
(2)
Addition of another single-pole RC filter of 1.4 kHz on the
output (R3 and C3 in Figure 3 to Figure 5) is required for
bandwidths greater than 10 Hz. These two filters produce an
overall bandwidth of 1 kHz.
When driving an ADC, the recommended values for the second
filter are R3 = 100 Ω and C3 = 1 μF. This filter is required to
achieve the specified performance. It also acts as an anti-
aliasing filter for the ADC. If a sampling ADC is not being
driven, the value of the capacitor can be reduced, but the filter
frequency should remain unchanged.
For applications with low bandwidths (<10 Hz), only the first
filter is required. In this case, the high frequency noise from the
auto-zero amplifier (output amplifier) is not filtered before the
following stage.
CLOCK FEEDTHROUGH
The AD8563 uses two synchronized clocks to perform the auto-
correction. The input voltage-to-current amplifiers are
corrected at 60 kHz.
Trace amounts of these clock frequencies can be observed at the
output. The amount of feedthrough is dependent upon the gain,
because the auto-correction noise has an input and output
referred term. The correction feedthrough is also dependent
upon the values of the external filters R2/C2, and R3/C3.
LOW IMPEDANCE OUTPUT
For applications where a low output impedance is required, the
circuit in Figure 5 should be used. This provides the same
filtering performance as shown in the configuration in Figure 6.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8563ARMZ-R2 | 1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| AD8563ARMZ-REEL | 1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| AD8571ARM-R2 | Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers |
| AD8571ARM-REEL | Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers |
| AD8571ARMZ-R2 | Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8563ARMZ-R2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| AD8563ARMZ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| AD8564 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 7 ns Single Supply Comparator |
| AD8564_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 7 ns Single Supply Comparator |
| AD8564AN | 功能描述:IC COMP QUAD 7NS ULT-FAST 16-DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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