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AD8531/AD8532/AD8534
REV. A
–10–
condition continues to exist, an external series resistor should
be added. T he size of the resistor is calculated by dividing the
maximum overvoltage by 5 mA. For example, if the input volt-
age could reach 10 V, the external resistor should be (10 V/5
mA) = 2 k
. T his resistance should be placed in series with
either or both inputs if they are exposed to an overvoltage con-
dition. For more information on general overvoltage character-
istics of amplifiers refer to the
1993 Seminar Applications Guide
,
available from the Analog Devices Literature Center.
Output Phase Reversal
Some operational amplifiers designed for single-supply opera-
tion exhibit an output voltage phase reversal when their inputs
are driven beyond their useful common-mode range. T he
AD8531/AD8532/AD8534 is free from reasonable input voltage
range restrictions provided that input voltages no greater than
the supply voltage rails are applied. Although the device’s out-
put will not change phase, large currents can flow through in-
ternal junctions to the supply rails, as was pointed out in the
previous section. Without limit, these fault currents can easily
destroy the amplifier. T he technique recommended in the in-
put overvoltage protection section should therefore be applied
in those applications where the possibility of input voltages ex-
ceeding the supply voltages exists.
Capacitive Load Drive
T he AD8531/AD8532/AD8534 exhibits excellent capacitive
load driving capabilities. It can drive up to 10 nF directly as
shown in Figures 21 through 24. However, even though the
device is stable, a capacitive load does not come without a pen-
alty in bandwidth. As shown in Figure 35, the bandwidth is re-
duced to under 1 MHz for loads greater than 10 nF. A “snubber”
network on the output won’t increase the bandwidth, but it
does significantly reduce the amount of overshoot for a given
capacitive load. A snubber consists of a series R-C network
(R
S
, C
S
), as shown in Figure 36, connected from the output of
the device to ground. T his network operates in parallel with the
load capacitor, C
L
, to provide phase lag compensation. T he actual
value of the resistor and capacitor is best determined empirically.
CAPACITIVE LOAD – nF
4
3.5
0
0.01
100
0.1
B
1
10
2
1.5
1
0.5
3
2.5
V
S
=
6
2.5V
R
L
= 1k
T
A
= +25
8
C
Figure 35. Unity-Gain Bandwidth vs. Capacitive Load
+5V
R
S
5
V
OUT
V
IN
100mV p-p
AD8532
C
L
47nF
C
S
1μF
Figure 36. Snubber Network Compensates for Capacitive
Loads
T he first step is to determine the value of the resistor, R
S
. A
good starting value is 100
. T his value is reduced until the
small-signal transient response is optimized. Next, C
S
is deter-
mined—10
μ
F is a good starting point. T his value is reduced to
the smallest value for acceptable performance (typically, 1
μ
F).
For the case of a 47 nF load capacitor on the AD8531/AD8532/
AD8534, the optimal snubber network is a 5
in series with
1
μ
F. T he benefit is immediately apparent as seen in the scope
photo in Figure 37. T he top trace was taken with a 47 nF load
and the bottom trace with the 5
—1
μ
F snubber network in
place. T he amount of overshoot and ringing is dramatically re-
duced. T able I below illustrates a few sample snubber networks
for large load capacitors:
T able I. Snubber Networks for Large Capacitive Loads
Load Capacitance
(C
L
)
Snubber Network
(R
S
, C
S
)
0.47 nF
4.7 nF
47 nF
300
, 0.1
μ
F
30
, 1
μ
F
5
, 1
μ
F
10
0%
10
m
s
50mV
100
90
50mV
47nF LOAD
ONLY
SNUBBER
IN CIRCUIT
Figure 37. Overshoot and Ringing Is Reduced by Adding
a Snubber Network in Parallel with the 47 nF Load