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參數資料
| 型號： | AD8512BRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET 8MHZ DUAL LN 8SOIC |
| 設計資源： | Precision, Bipolar Configuration for the AD5546/56 DAC (CN0024) Precision, Bipolar, Configuration for AD5547/AD5557 DAC (CN0028) |
| 標準包裝： | 1,000 |
| 放大器類型： | J-FET |
| 電路數： | 2 |
| 轉換速率： | 20 V/µs |
| 增益帶寬積： | 8MHz |
| 電流 - 輸入偏壓： | 25pA |
| 電壓 - 輸入偏移： | 80µV |
| 電流 - 電源： | 2.2mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
AD8510/AD8512/AD8513
Rev. I | Page 14 of 20
SETTLING TIME
Settling time is the time it takes the output of the amplifier to
reach and remain within a percentage of its final value after a
pulse is applied at the input. The AD8510/AD8512/AD8513
settle to within 0.01% in less than 900 ns with a step of 0 V to
10 V in unity gain. This makes each of these parts an excellent
choice as a buffer at the output of DACs whose settling time is
typically less than 1 μs.
In addition to the fast settling time and fast slew rate, low offset
voltage drift and input offset current maintain the full accuracy
of 12-bit converters over the entire operating temperature range.
OVERLOAD RECOVERY TIME
Overload recovery, also known as overdrive recovery, is the
time it takes the output of an amplifier to recover to its linear
region from a saturated condition. This recovery time is par-
ticularly important in applications where the amplifier must
amplify small signals in the presence of large transient voltages.
Figure 43 shows the positive overload recovery of the AD8510/
AD8512/AD8513. The output recovers in approximately 200 ns
from a saturated condition.
0V
–15V
200mV
0V
OU
TP
U
T
IN
P
U
T
VO
LT
AG
E
TIME (2s/DIV)
VSY = ±15V
VIN = 200mV
AV = –100
RL = 10k
02
72
9-
05
3
Figure 43. Positive Overload Recovery
The negative overdrive recovery time shown in Figure 44 is less
than 200 ns.
In addition to the fast recovery time, the AD8510/AD8512/
AD8513 show excellent symmetry of the positive and negative
recovery times. This is an important feature for transient signal
rectification because the output signal is kept equally undistorted
throughout any given period.
TIME (2s/DIV)
VOL
TA
G
E
–200mV
0V
+15V
02
72
9-
0
54
IN
P
U
T
OU
T
P
U
T
VSY = ±15V
AV = –100
RL = 10k
Figure 44. Negative Overload Recovery
CAPACITIVE LOAD DRIVE
The AD8510/AD8512/AD8513 are unconditionally stable at all
gains in inverting and noninverting configurations. Each device
is capable of driving a capacitive load of up to 1000 pF without
oscillation in unity gain using the worst-case configuration.
However, as with most amplifiers, driving larger capacitive
loads in a unity gain configuration may cause excessive
overshoot and ringing, or even oscillation. A simple snubber
network significantly reduces the amount of overshoot and
ringing. The advantage of this configuration is that the output
swing of the amplifier is not reduced, because RS is outside the
feedback loop.
7
4
6
AD8510
200mV
RS
CS
CL
VOUT
V+
V–
02
72
9-
0
55
2
3
Figure 45. Snubber Network Configuration
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