參數(shù)資料
型號: AD847AR-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 2/12頁
文件大?。?/td> 0K
描述: IC OPAMP GP 50MHZ LP 32MA 8SOIC
標(biāo)準(zhǔn)包裝: 750
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 300 V/µs
增益帶寬積: 50MHz
電流 - 輸入偏壓: 3.3µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 5.3mA
電流 - 輸出 / 通道: 32mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD847
REV. F
–10–
VIDEO LINE DRIVER
The AD847 functions very well as a low cost, high speed line
driver for either terminated or unterminated cables. Figure 23
shows the AD847 driving a doubly terminated cable in a fol-
lower configuration.
The termination resistor, RT, (when equal to the cable’s charac-
teristic impedance) minimizes reflections from the far end of the
cable. While operating from
±5 V supplies, the AD847 main-
tains a typical slew rate of 200 V/
s, which means it can drive a
±1 V, 30 MHz signal into a terminated cable.
0.1
F
0.1
F
500
500
75
AD847
75
75
R T
RBT
C
SEE TABLE I
+VS
V
IN
VOUT
–V
S
IN
R
100
75
COAX
75
COAX
Figure 23. Video Line Driver
Table I. Video Line Driver Performance Chart
Over-
VIN*VSUPPLY
CC
–3 dB BW shoot
0 dB or
±500 mV Step
±15
20 pF
23 MHz
4%
0 dB or
±500 mV Step
±15
15 pF
21 MHz
0%
0 dB or
±500 mV Step
±15
0 pF
13 MHz
0%
0 dB or
±500 mV Step
±5
20 pF
18 MHz
2%
0 dB or
±500 mV Step
±5
15 pF
16 MHz
0%
0 dB or
±500 mV Step
±5
0 pF
11 MHz
0%
*–3 dB bandwidth numbers are for the 0 dBm signal input. Overshoot numbers
are the percent overshoot of the 1 volt step input.
A back-termination resistor (RBT, also equal to the characteristic
impedance of the cable) may be placed between the AD847 out-
put and the cable input, in order to damp any reflected signals
caused by a mismatch between RT and the cable’s characteristic
impedance. This will result in a flatter frequency response, al-
though this requires that the op amp supply
±2 V to the output
in order to achieve a
±1 V swing at resistor R
T.
Figure 24 shows the AD847 driving 100 pF and 1000 pF loads.
Figure 24. AD847 Driving Capacitive Loads
FLASH ADC INPUT BUFFER
The 35 MHz unity gain bandwidth of the AD847 makes it an
excellent choice for buffering the input of high speed flash A/D
converters, such as the AD9048.
Figure 25 shows the AD847 as a unity inverter for the input to
the AD9048.
AD9048
50
1.5k
10k
2k
0.1
100
27
2N3906
AD741
5
0.1
F
RB
RT
VIN
VCC
AD847
1.5k
V
EE
ANALOG
INPUT
(0V TO +2V)
TTL
CONVERT
SIGNAL
0.1
F
0.1
F
–5.2V +5.0V
CONVERT
D1
(MSB)
D8
(LSB)
–5.2V
43
1k
AD589
Figure 25. Flash ADC Input Buffer
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